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Searched refs:dc_clocks (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dclk_mgr.h248 bool (*are_clock_states_equal) (struct dc_clocks *a,
249 struct dc_clocks *b);
274 struct dc_clocks clks;
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
A Drv1_clk_mgr.c39 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in rv1_init_clocks()
42 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_c… in rv1_determine_dppclk_threshold()
91 struct dc_clocks *new_clocks, in ramp_up_dispclk_with_dpp()
197 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rv1_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
A Ddcn201_clk_mgr.c81 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn201_update_clocks_vbios()
115 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn201_init_clocks()
127 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn201_update_clocks()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
A Ddcn20_clk_mgr.c214 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks()
350 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn2_update_clocks_fpga()
406 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn2_init_clocks()
471 static bool dcn2_are_clock_states_equal(struct dc_clocks *a, in dcn2_are_clock_states_equal()
472 struct dc_clocks *b) in dcn2_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
A Ddcn30_clk_mgr.c165 memset(&(clk_mgr_base->clks), 0, sizeof(struct dc_clocks)); in dcn3_init_clocks()
248 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn3_update_clocks()
450 static bool dcn3_are_clock_states_equal(struct dc_clocks *a, in dcn3_are_clock_states_equal()
451 struct dc_clocks *b) in dcn3_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_clk_mgr.c127 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn31_update_clocks()
290 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in dcn31_init_clocks()
298 static bool dcn31_are_clock_states_equal(struct dc_clocks *a, in dcn31_are_clock_states_equal()
299 struct dc_clocks *b) in dcn31_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Dvg_clk_mgr.c97 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in vg_update_clocks()
391 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in vg_init_clocks()
477 static bool vg_are_clock_states_equal(struct dc_clocks *a, in vg_are_clock_states_equal()
478 struct dc_clocks *b) in vg_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/
A Ddm_helpers.h161 struct dc_clocks *clks);
A Ddc.h393 struct dc_clocks { struct
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr.c130 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in rn_update_clocks()
460 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in rn_init_clocks()
540 static bool rn_are_clock_states_equal(struct dc_clocks *a, in rn_are_clock_states_equal()
541 struct dc_clocks *b) in rn_are_clock_states_equal()
/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dcore_types.h442 struct dc_clocks clk;
A Ddcn_calcs.h629 struct dc_clocks *clocks);
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_helpers.c706 void dm_set_dcn_clocks(struct dc_context *ctx, struct dc_clocks *clks) in dm_set_dcn_clocks()
A Damdgpu_dm_trace.h488 TP_PROTO(const struct dc_clocks *clk),
/linux/drivers/gpu/drm/amd/display/dc/calcs/
A Ddcn_calcs.c1431 struct dc_clocks *clocks) in dcn_find_dcfclk_suits_all()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc.c2429 …->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_clocks, prev_p_state_ch… in dc_check_update_surfaces_for_stream()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hw_sequencer.c3718 struct dc_clocks *current_clocks = &context->bw_ctx.bw.dcn.clk; in dcn10_set_clock()

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