| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_resource.h | 54 struct dc_state *context,
58 struct dc_state *state,
118 struct dc_state *context,
121 bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);
124 struct dc_state *context);
127 struct dc_state *context,
134 bool dcn20_validate_dsc(struct dc *dc, struct dc_state *new_ctx);
155 struct dc_state *context,
162 struct dc *dc, struct dc_state *context,
168 enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_st…
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| A D | dcn20_hwseq.h | 37 struct dc_state *context);
40 struct dc_state *context);
66 struct dc_state *context);
69 struct dc_state *context);
72 struct dc_state *context);
75 struct dc_state *context);
78 struct dc_state *context,
107 struct dc_state *context);
111 void dcn20_update_odm(struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx);
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| A D | hw_sequencer.h | 41 struct dc_state;
63 struct dc_state *context);
65 struct dc_state *context);
71 struct dc_state *context);
73 struct dc_state *context);
75 struct dc_state *context);
95 struct dc_state *context, bool lock);
177 struct dc_state *context);
180 struct dc_state *context);
195 struct dc_state *context);
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| A D | core_types.h | 79 struct dc_state *state,
90 struct dc_state;
118 struct dc_state *context,
130 struct dc_state *state,
140 struct dc_state *state,
145 struct dc_state *context);
148 struct dc_state *context,
156 struct dc_state *new_ctx,
161 struct dc_state *new_ctx,
177 struct dc_state *context,
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| A D | resource.h | 103 struct dc_state *context,
110 struct dc_state *context);
153 struct dc_state *context,
164 const struct dc_state *old_context,
165 struct dc_state *context,
169 const struct dc_state *src_ctx,
170 struct dc_state *dst_ctx);
174 struct dc_state *context,
179 struct dc_state *context,
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| A D | hw_sequencer_private.h | 56 struct dc_state;
77 void (*init_pipes)(struct dc *dc, struct dc_state *context);
78 void (*reset_hw_ctx_wrap)(struct dc *dc, struct dc_state *context);
102 struct dc_state *context,
127 void (*update_odm)(struct dc *dc, struct dc_state *context,
131 struct dc_state *context);
137 struct dc_state *context);
144 void (*PLAT_58856_wa)(struct dc_state *context,
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| A D | link_enc_cfg.h | 40 struct dc_state *state);
54 struct dc_state *state,
65 struct dc_state *state,
103 bool link_enc_cfg_validate(struct dc *dc, struct dc_state *state);
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hw_sequencer.h | 45 struct dc_state *context,
49 struct dc_state *context);
52 struct dc_state *context);
77 struct dc_state *context);
81 struct dc_state *context,
85 struct dc_state *context);
103 struct dc_state *context);
106 void dcn10_init_pipes(struct dc *dc, struct dc_state *context);
110 struct dc_state *context);
194 struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_resource.h | 47 struct dc_state *context,
56 bool dcn30_validate_bandwidth(struct dc *dc, struct dc_state *context,
60 struct dc_state *context,
66 struct dc *dc, struct dc_state *context,
70 void dcn30_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
75 struct dc *dc, struct dc_state *context,
94 struct dc_state *new_ctx,
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| A D | dcn30_hwseq.h | 37 struct dc_state *context);
41 struct dc_state *context);
45 struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| A D | dcn20_clk_mgr.h | 30 struct dc_state *context,
34 struct dc_state *context,
37 struct dc_state *context, bool safe_to_lower);
49 struct dc_state *context,
54 struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_stream.h | 321 struct dc_state *state);
355 struct dc_state *new_ctx,
360 struct dc_state *new_ctx,
368 struct dc_state *context);
374 struct dc_state *context);
379 struct dc_state *context);
386 struct dc_state *context);
397 struct dc_state *state,
426 struct dc_state *context,
431 void dc_trigger_sync(struct dc *dc, struct dc_state *context);
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| A D | dc.h | 286 struct dc_state;
569 struct dc_state;
710 struct dc_state *current_state;
1127 struct dc_state *new_ctx,
1133 struct dc_state *dst_ctx);
1144 const struct dc_state *src_ctx,
1145 struct dc_state *dst_ctx);
1149 struct dc_state *dst_ctx);
1166 struct dc_state *dc_create_state(struct dc *dc);
1167 struct dc_state *dc_copy_state(struct dc_state *src_ctx);
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_hw_sequencer.h | 33 struct dc_state;
40 struct dc_state *context);
58 void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context);
68 struct dc_state *context);
72 struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/dce112/ |
| A D | dce112_resource.h | 42 struct dc_state *context,
43 struct dc_state *old_context);
47 struct dc_state *context,
52 struct dc_state *new_ctx,
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| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_hwseq.h | 41 struct dc_state *context);
45 struct dc_state *context);
47 void dcn21_PLAT_58856_wa(struct dc_state *context,
56 struct dc_state *context, struct dc_stream_state *stream);
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_mst_types.c | 765 struct dc_state *dc_state, in compute_mst_dsc_configs_for_link() argument
780 for (i = 0; i < dc_state->stream_count; i++) { in compute_mst_dsc_configs_for_link()
783 stream = dc_state->streams[i]; in compute_mst_dsc_configs_for_link()
888 struct dc_state *dc_state, in is_dsc_need_re_compute() argument
899 for (i = 0; i < dc_state->stream_count; i++) { in is_dsc_need_re_compute()
905 stream = dc_state->streams[i]; in is_dsc_need_re_compute()
948 struct dc_state *dc_state, in compute_mst_dsc_configs_for_state() argument
957 for (i = 0; i < dc_state->stream_count; i++) in compute_mst_dsc_configs_for_state()
960 for (i = 0; i < dc_state->stream_count; i++) { in compute_mst_dsc_configs_for_state()
961 stream = dc_state->streams[i]; in compute_mst_dsc_configs_for_state()
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| A D | amdgpu_dm_mst_types.h | 51 struct dc_state *dc_state,
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| A D | dce110_clk_mgr.h | 34 const struct dc_state *context,
40 struct dc_state *context);
42 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/dce100/ |
| A D | dce100_hw_sequencer.h | 33 struct dc_state;
39 struct dc_state *context);
43 struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_link_enc_cfg.c | 79 struct dc_state *state, in get_stream_using_link_enc()
98 struct dc_state *state, in remove_link_enc_assignment()
129 struct dc_state *state, in add_link_enc_assignment()
165 const struct dc_state *state) in find_first_avail_link_enc()
219 struct dc_state *state, in get_link_enc_used_by_link()
240 static void clear_enc_assignments(struct dc_state *state) in clear_enc_assignments()
259 struct dc_state *state) in link_enc_cfg_init()
277 struct dc_state *state, in link_enc_cfg_link_encs_assign()
316 struct dc_state *prev_state = dc->current_state; in link_enc_cfg_link_encs_assign()
387 struct dc_state *state, in link_enc_cfg_link_enc_unassign()
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| A D | dc.c | 1042 struct dc_state *context) in disable_all_writeback_pipes_for_stream()
1126 struct dc_state *context) in disable_vbios_mode_if_required()
1316 struct dc_state *ctx) in enable_timing_multisync()
1340 struct dc_state *ctx) in program_timing_sync()
1621 struct dc_state *context, in dc_enable_stereo()
1964 struct dc_state *context = kvzalloc(sizeof(struct dc_state), in dc_create_state()
1977 struct dc_state *dc_copy_state(struct dc_state *src_ctx) in dc_copy_state()
1980 struct dc_state *new_ctx = kvmalloc(sizeof(struct dc_state), GFP_KERNEL); in dc_copy_state()
2022 struct dc_state *context = container_of(kref, struct dc_state, refcount); in dc_state_free()
2440 struct dc_state *ctx, in stream_get_status()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_hwseq.h | 53 struct dc_state *context);
55 struct dc_state *context, struct dc_stream_state *stream);
56 void dcn31_init_pipes(struct dc *dc, struct dc_state *context);
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| A D | dcn31_resource.h | 39 struct dc_state *context,
42 struct dc *dc, struct dc_state *context,
46 void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| A D | dce_clk_mgr.h | 37 struct dc_state *context);
39 uint32_t dce_get_max_pixel_clock_for_all_paths(struct dc_state *context);
|