Searched refs:dccg_dcn (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_dccg.c | 34 (dccg_dcn->regs->reg)
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
41 dccg_dcn->base.ctx
61 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg3_create() local
64 if (dccg_dcn == NULL) { in dccg3_create()
69 base = &dccg_dcn->base; in dccg3_create()
73 dccg_dcn->regs = regs; in dccg3_create()
77 return &dccg_dcn->base; in dccg3_create()
86 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg30_create() local
89 if (dccg_dcn == NULL) { in dccg30_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_dccg.c | 36 (dccg_dcn->regs->reg)
40 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
43 dccg_dcn->base.ctx
151 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_ATOMIC); in dccg2_create() local
154 if (dccg_dcn == NULL) { in dccg2_create()
159 base = &dccg_dcn->base; in dccg2_create()
163 dccg_dcn->regs = regs; in dccg2_create()
164 dccg_dcn->dccg_shift = dccg_shift; in dccg2_create()
165 dccg_dcn->dccg_mask = dccg_mask; in dccg2_create()
167 return &dccg_dcn->base; in dccg2_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| A D | dcn301_dccg.c | 34 (dccg_dcn->regs->reg)
38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
41 dccg_dcn->base.ctx
60 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg301_create() local
63 if (dccg_dcn == NULL) { in dccg301_create()
68 base = &dccg_dcn->base; in dccg301_create()
72 dccg_dcn->regs = regs; in dccg301_create()
73 dccg_dcn->dccg_shift = dccg_shift; in dccg301_create()
74 dccg_dcn->dccg_mask = dccg_mask; in dccg301_create()
76 return &dccg_dcn->base; in dccg301_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_dccg.c | 35 (dccg_dcn->regs->reg)
39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
42 dccg_dcn->base.ctx
67 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg201_create() local
70 if (dccg_dcn == NULL) { in dccg201_create()
75 base = &dccg_dcn->base; in dccg201_create()
79 dccg_dcn->regs = regs; in dccg201_create()
80 dccg_dcn->dccg_shift = dccg_shift; in dccg201_create()
81 dccg_dcn->dccg_mask = dccg_mask; in dccg201_create()
83 return &dccg_dcn->base; in dccg201_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_dccg.c | 35 (dccg_dcn->regs->reg)
39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
42 dccg_dcn->base.ctx
48 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg21_update_dpp_dto() local
115 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg21_create() local
118 if (dccg_dcn == NULL) { in dccg21_create()
123 base = &dccg_dcn->base; in dccg21_create()
127 dccg_dcn->regs = regs; in dccg21_create()
128 dccg_dcn->dccg_shift = dccg_shift; in dccg21_create()
129 dccg_dcn->dccg_mask = dccg_mask; in dccg21_create()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_dccg.c | 35 (dccg_dcn->regs->reg)
39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
42 dccg_dcn->base.ctx
85 struct dcn_dccg *dccg_dcn, in get_phy_mux_symclk() argument
643 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg31_create() local
646 if (dccg_dcn == NULL) { in dccg31_create()
651 base = &dccg_dcn->base; in dccg31_create()
655 dccg_dcn->regs = regs; in dccg31_create()
656 dccg_dcn->dccg_shift = dccg_shift; in dccg31_create()
657 dccg_dcn->dccg_mask = dccg_mask; in dccg31_create()
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