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Searched refs:dce_environment (Results 1 – 25 of 52) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/gpio/
A Dhw_translate.c65 enum dce_environment dce_environment) in dal_hw_translate_init() argument
67 if (IS_FPGA_MAXIMUS_DC(dce_environment)) { in dal_hw_translate_init()
A Dhw_factory.c67 enum dce_environment dce_environment) in dal_hw_factory_init() argument
69 if (IS_FPGA_MAXIMUS_DC(dce_environment)) { in dal_hw_factory_init()
A Dhw_translate.h48 enum dce_environment dce_environment);
A Dhw_factory.h75 enum dce_environment dce_environment);
A Dgpio_service.c57 enum dce_environment dce_environment, in dal_gpio_service_create() argument
71 dce_environment)) { in dal_gpio_service_create()
77 dce_environment)) { in dal_gpio_service_create()
/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_types.h55 enum dce_environment { enum
72 #define IS_FPGA_MAXIMUS_DC(dce_environment) \ argument
73 (dce_environment == DCE_ENV_FPGA_MAXIMUS)
75 #define IS_DIAG_DC(dce_environment) \ argument
76 (IS_FPGA_MAXIMUS_DC(dce_environment) || (dce_environment == DCE_ENV_DIAG))
839 enum dce_environment dce_environment; member
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr_vbios_smu.c131 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in rn_vbios_smu_set_dispclk()
140 if (!IS_DIAG_DC(dc->ctx->dce_environment)) in rn_vbios_smu_set_dispclk()
208 if (!IS_DIAG_DC(dc->ctx->dce_environment)) in rn_vbios_smu_set_dppclk()
/linux/drivers/gpu/drm/amd/display/include/
A Dgpio_service_interface.h46 enum dce_environment dce_environment,
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_hwss.c526 if (dc_is_virtual_signal(stream->signal) || IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) in dp_set_dsc_on_rx()
577 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)
580 if (dc_is_dp_signal(stream->signal) && !IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
617 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
776 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
799 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
823 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
A Ddc_stream.c479 if (IS_DIAG_DC(dc->ctx->dce_environment)) { in dc_stream_add_writeback()
536 if (IS_DIAG_DC(dc->ctx->dce_environment)) { in dc_stream_remove_writeback()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
A Ddce112_clk_mgr.c114 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dce112_set_clock()
156 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dce112_set_dispclk()
/linux/drivers/gpu/drm/amd/display/dc/dce112/
A Ddce112_hw_sequencer.c123 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in dce112_enable_display_power_gating()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
A Drv1_clk_mgr_vbios_smu.c135 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in rv1_vbios_smu_set_dispclk()
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_hwseq.c120 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn31_init_hw()
156 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn31_init_hw()
544 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn31_reset_back_end_for_pipe()
A Ddcn31_init.c150 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn31_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_init.c142 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn20_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/dce120/
A Ddce120_hw_sequencer.c162 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) in dce120_enable_display_power_gating()
/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_init.c148 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn21_hw_sequencer_construct()
/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_init.c147 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_hw_sequencer_construct()
A Ddcn30_hwseq.c334 if (IS_DIAG_DC(dc->ctx->dce_environment)) { in dcn30_enable_writeback()
451 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_init_hw()
495 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn30_init_hw()
A Ddcn30_optc.c54 if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS) in optc3_triplebuffer_lock()
/linux/drivers/gpu/drm/amd/display/dc/dcn201/
A Ddcn201_hwseq.c234 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn201_init_hw()
250 if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) { in dcn201_init_hw()
366 if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) in dcn201_init_hw()
A Ddcn201_optc.c58 if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS) in optc201_triplebuffer_lock()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Dvg_clk_mgr.c117 if (display_count == 0 && !IS_DIAG_DC(dc->ctx->dce_environment)) { in vg_update_clocks()
151 if (!IS_DIAG_DC(dc->ctx->dce_environment)) { in vg_update_clocks()
775 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in vg_clk_mgr_construct()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
A Ddcn201_clk_mgr.c235 if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { in dcn201_clk_mgr_construct()

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