Searched refs:dcefclk (Results 1 – 7 of 7) sorted by relevance
344 smu->smu_table.boot_values.dcefclk = 0; in smu_v12_0_get_vbios_bootup_values()361 smu->smu_table.boot_values.dcefclk = 0; in smu_v12_0_get_vbios_bootup_values()382 &smu->smu_table.boot_values.dcefclk); in smu_v12_0_get_vbios_bootup_values()
543 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()557 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()572 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()593 &smu->smu_table.boot_values.dcefclk); in smu_v13_0_get_vbios_bootup_values()855 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v13_0_init_max_sustainable_clocks()
579 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()596 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()617 &smu->smu_table.boot_values.dcefclk); in smu_v11_0_get_vbios_bootup_values()882 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v11_0_init_max_sustainable_clocks()
1087 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1105 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1123 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1141 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()
806 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()824 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()842 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()860 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()
294 uint32_t dcefclk; member
1288 smu->smu_table.boot_values.dcefclk / 100); in smu_smc_hw_setup()
Completed in 31 milliseconds