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Searched refs:dfixed_const (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/radeon/
A Drs690.c128 tmp.full = dfixed_const(4); in rs690_pm_info()
133 tmp.full = dfixed_const(5); in rs690_pm_info()
302 a.full = dfixed_const(16); in rs690_crtc_bandwidth_compute()
332 b.full = dfixed_const(2); in rs690_crtc_bandwidth_compute()
336 c.full = dfixed_const(2); in rs690_crtc_bandwidth_compute()
342 a.full = dfixed_const(1); in rs690_crtc_bandwidth_compute()
386 a.full = dfixed_const(16); in rs690_crtc_bandwidth_compute()
397 a.full = dfixed_const(10); in rs690_crtc_bandwidth_compute()
409 a.full = dfixed_const(3); in rs690_crtc_bandwidth_compute()
413 a.full = dfixed_const(2); in rs690_crtc_bandwidth_compute()
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A Drv515.c949 a.full = dfixed_const(100); in rv515_crtc_bandwidth_compute()
959 c.full = dfixed_const(256); in rv515_crtc_bandwidth_compute()
976 b.full = dfixed_const(1000); in rv515_crtc_bandwidth_compute()
980 b.full = dfixed_const(2); in rv515_crtc_bandwidth_compute()
984 c.full = dfixed_const(2); in rv515_crtc_bandwidth_compute()
990 a.full = dfixed_const(1); in rv515_crtc_bandwidth_compute()
1030 a.full = dfixed_const(3); in rv515_crtc_bandwidth_compute()
1061 a.full = dfixed_const(16); in rv515_crtc_bandwidth_compute()
1072 a.full = dfixed_const(16); in rv515_crtc_bandwidth_compute()
1107 a.full = dfixed_const(16); in rv515_compute_mode_priority()
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A Devergreen.c1959 a.full = dfixed_const(10); in evergreen_dram_bandwidth()
1979 a.full = dfixed_const(10); in evergreen_dram_bandwidth_for_display()
1998 a.full = dfixed_const(10); in evergreen_data_return_bandwidth()
2001 a.full = dfixed_const(32); in evergreen_data_return_bandwidth()
2018 a.full = dfixed_const(10); in evergreen_dmif_request_bandwidth()
2021 a.full = dfixed_const(32); in evergreen_dmif_request_bandwidth()
2079 a.full = dfixed_const(2); in evergreen_latency_watermark()
2080 b.full = dfixed_const(1); in evergreen_latency_watermark()
2135 a.full = dfixed_const(1); in evergreen_check_latency_hiding()
2263 a.full = dfixed_const(16); in evergreen_program_watermarks()
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A Dsi.c2075 a.full = dfixed_const(1000); in dce6_dram_bandwidth()
2079 a.full = dfixed_const(10); in dce6_dram_bandwidth()
2099 a.full = dfixed_const(10); in dce6_dram_bandwidth_for_display()
2118 a.full = dfixed_const(10); in dce6_data_return_bandwidth()
2121 a.full = dfixed_const(32); in dce6_data_return_bandwidth()
2153 a.full = dfixed_const(10); in dce6_dmif_request_bandwidth()
2217 a.full = dfixed_const(2); in dce6_latency_watermark()
2218 b.full = dfixed_const(1); in dce6_latency_watermark()
2275 a.full = dfixed_const(1); in dce6_check_latency_hiding()
2408 a.full = dfixed_const(16); in dce6_program_watermarks()
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A Dr100.c3261 temp_ff.full = dfixed_const(temp); in r100_bandwidth_update()
3268 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update()
3275 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update()
3325 trp_ff.full = dfixed_const(mem_trp); in r100_bandwidth_update()
3408 k1.full = dfixed_const(40); in r100_bandwidth_update()
3411 k1.full = dfixed_const(20); in r100_bandwidth_update()
3415 k1.full = dfixed_const(40); in r100_bandwidth_update()
3419 temp_ff.full = dfixed_const(2); in r100_bandwidth_update()
3421 temp_ff.full = dfixed_const(c); in r100_bandwidth_update()
3423 temp_ff.full = dfixed_const(4); in r100_bandwidth_update()
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A Dcik.c8930 a.full = dfixed_const(1000); in dce8_dram_bandwidth()
8934 a.full = dfixed_const(10); in dce8_dram_bandwidth()
8959 a.full = dfixed_const(1000); in dce8_dram_bandwidth_for_display()
8963 a.full = dfixed_const(10); in dce8_dram_bandwidth_for_display()
8991 a.full = dfixed_const(10); in dce8_data_return_bandwidth()
8994 a.full = dfixed_const(32); in dce8_data_return_bandwidth()
9020 a.full = dfixed_const(32); in dce8_dmif_request_bandwidth()
9023 a.full = dfixed_const(10); in dce8_dmif_request_bandwidth()
9111 a.full = dfixed_const(2); in dce8_latency_watermark()
9112 b.full = dfixed_const(1); in dce8_latency_watermark()
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A Dradeon_display.c1755 a.full = dfixed_const(src_v); in radeon_crtc_scaling_mode_fixup()
1756 b.full = dfixed_const(dst_v); in radeon_crtc_scaling_mode_fixup()
1758 a.full = dfixed_const(src_h); in radeon_crtc_scaling_mode_fixup()
1759 b.full = dfixed_const(dst_h); in radeon_crtc_scaling_mode_fixup()
1762 radeon_crtc->vsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()
1763 radeon_crtc->hsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()
A Dradeon_device.c730 a.full = dfixed_const(100); in radeon_update_bandwidth_info()
731 rdev->pm.sclk.full = dfixed_const(sclk); in radeon_update_bandwidth_info()
733 rdev->pm.mclk.full = dfixed_const(mclk); in radeon_update_bandwidth_info()
737 a.full = dfixed_const(16); in radeon_update_bandwidth_info()
/linux/include/drm/
A Ddrm_fixed.h35 #define dfixed_const(A) (u32)(((A) << 12))/* + ((B + 0.000122)*4096)) */ macro
40 #define dfixed_init(A) { .full = dfixed_const((A)) }
49 return dfixed_const(non_frac); in dfixed_floor()
56 if (A.full > dfixed_const(non_frac)) in dfixed_ceil()
57 return dfixed_const(non_frac + 1); in dfixed_ceil()
59 return dfixed_const(non_frac); in dfixed_ceil()
/linux/drivers/gpu/drm/amd/amdgpu/
A Ddce_v6_0.c530 a.full = dfixed_const(10); in dce_v6_0_dram_bandwidth()
559 a.full = dfixed_const(10); in dce_v6_0_dram_bandwidth_for_display()
587 a.full = dfixed_const(10); in dce_v6_0_data_return_bandwidth()
590 a.full = dfixed_const(32); in dce_v6_0_data_return_bandwidth()
616 a.full = dfixed_const(32); in dce_v6_0_dmif_request_bandwidth()
619 a.full = dfixed_const(10); in dce_v6_0_dmif_request_bandwidth()
707 a.full = dfixed_const(2); in dce_v6_0_latency_watermark()
708 b.full = dfixed_const(1); in dce_v6_0_latency_watermark()
796 a.full = dfixed_const(1); in dce_v6_0_check_latency_hiding()
937 a.full = dfixed_const(16); in dce_v6_0_program_watermarks()
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A Ddce_v8_0.c663 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth()
667 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth()
692 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth_for_display()
696 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth_for_display()
724 a.full = dfixed_const(10); in dce_v8_0_data_return_bandwidth()
727 a.full = dfixed_const(32); in dce_v8_0_data_return_bandwidth()
753 a.full = dfixed_const(32); in dce_v8_0_dmif_request_bandwidth()
756 a.full = dfixed_const(10); in dce_v8_0_dmif_request_bandwidth()
844 a.full = dfixed_const(2); in dce_v8_0_latency_watermark()
845 b.full = dfixed_const(1); in dce_v8_0_latency_watermark()
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A Ddce_v10_0.c728 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth()
732 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth()
757 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth_for_display()
761 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth_for_display()
789 a.full = dfixed_const(10); in dce_v10_0_data_return_bandwidth()
792 a.full = dfixed_const(32); in dce_v10_0_data_return_bandwidth()
818 a.full = dfixed_const(32); in dce_v10_0_dmif_request_bandwidth()
821 a.full = dfixed_const(10); in dce_v10_0_dmif_request_bandwidth()
909 a.full = dfixed_const(2); in dce_v10_0_latency_watermark()
910 b.full = dfixed_const(1); in dce_v10_0_latency_watermark()
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A Ddce_v11_0.c754 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth()
758 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth()
783 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth_for_display()
787 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth_for_display()
815 a.full = dfixed_const(10); in dce_v11_0_data_return_bandwidth()
818 a.full = dfixed_const(32); in dce_v11_0_data_return_bandwidth()
844 a.full = dfixed_const(32); in dce_v11_0_dmif_request_bandwidth()
847 a.full = dfixed_const(10); in dce_v11_0_dmif_request_bandwidth()
935 a.full = dfixed_const(2); in dce_v11_0_latency_watermark()
936 b.full = dfixed_const(1); in dce_v11_0_latency_watermark()
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A Damdgpu_display.c1386 a.full = dfixed_const(src_v); in amdgpu_display_crtc_scaling_mode_fixup()
1387 b.full = dfixed_const(dst_v); in amdgpu_display_crtc_scaling_mode_fixup()
1389 a.full = dfixed_const(src_h); in amdgpu_display_crtc_scaling_mode_fixup()
1390 b.full = dfixed_const(dst_h); in amdgpu_display_crtc_scaling_mode_fixup()
1393 amdgpu_crtc->vsc.full = dfixed_const(1); in amdgpu_display_crtc_scaling_mode_fixup()
1394 amdgpu_crtc->hsc.full = dfixed_const(1); in amdgpu_display_crtc_scaling_mode_fixup()
/linux/drivers/gpu/drm/tegra/
A Ddc.c146 outf.full = max_t(u32, outf.full - dfixed_const(1), dfixed_const(1)); in compute_dda_inc()
147 inf.full -= dfixed_const(1); in compute_dda_inc()
150 dda_inc = min_t(u32, dda_inc, dfixed_const(max)); in compute_dda_inc()

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