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Searched refs:dig_port (Results 1 – 25 of 30) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
A Dintel_tc.c82 return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain); in tc_cold_block()
110 dig_port->tc_mode)); in assert_tc_cold_blocked()
237 dig_port->tc_legacy_port = !dig_port->tc_legacy_port; in tc_port_fixup_legacy_flag()
644 return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode; in intel_tc_port_needs_reset()
670 tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain, in intel_tc_port_update_mode()
673 dig_port->tc_lock_wakeref = tc_cold_block(dig_port, in intel_tc_port_update_mode()
697 if (dig_port->dp.is_mst) in intel_tc_port_sanitize()
708 dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port); in intel_tc_port_sanitize()
716 dig_port->tc_lock_wakeref = tc_cold_block(dig_port, in intel_tc_port_sanitize()
811 if (!dig_port->tc_link_refcount && dig_port->tc_mode != TC_PORT_DISCONNECTED) in intel_tc_port_unlock()
[all …]
A Dintel_dp_hdcp.c210 ret = drm_dp_dpcd_read(&dig_port->dp.aux, in intel_dp_hdcp_read_ksv_fifo()
234 ret = drm_dp_dpcd_read(&dig_port->dp.aux, in intel_dp_hdcp_read_v_prime_part()
346 ret = drm_dp_dpcd_read(&dig_port->dp.aux, in intel_dp_hdcp2_read_rx_status()
396 struct intel_dp *dp = &dig_port->dp; in intel_dp_hdcp2_wait_for_msg()
468 ret = drm_dp_dpcd_write(&dig_port->dp.aux, in intel_dp_hdcp2_write_msg()
487 ret = drm_dp_dpcd_read(&dig_port->dp.aux, in get_receiver_id_list_rx_info()
507 struct intel_dp *dp = &dig_port->dp; in intel_dp_hdcp2_read_msg()
638 ret = drm_dp_dpcd_read(&dig_port->dp.aux, in intel_dp_hdcp2_capable()
696 enum port port = dig_port->base.port; in intel_dp_mst_hdcp_stream_encryption()
733 enum port port = dig_port->base.port; in intel_dp_mst_hdcp2_stream_encryption()
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A Dintel_tc.h15 bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port);
16 bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port);
17 bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port);
21 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
27 void intel_tc_port_sanitize(struct intel_digital_port *dig_port);
28 void intel_tc_port_lock(struct intel_digital_port *dig_port);
29 void intel_tc_port_unlock(struct intel_digital_port *dig_port);
30 void intel_tc_port_flush_work(struct intel_digital_port *dig_port);
31 void intel_tc_port_get_link(struct intel_digital_port *dig_port,
33 void intel_tc_port_put_link(struct intel_digital_port *dig_port);
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A Dintel_hdcp.c59 if (dig_port->hdcp_auth_status) in intel_hdcp_required_content_stream()
71 if (conn_dig_port != dig_port) in intel_hdcp_required_content_stream()
388 enum port port = dig_port->base.port; in intel_hdcp_validate_v_prime()
1002 dig_port->num_hdcp_streams--; in intel_hdcp_update_value()
1004 dig_port->num_hdcp_streams++; in intel_hdcp_update_value()
1025 mutex_lock(&dig_port->hdcp_mutex); in intel_hdcp_check_link()
1643 dig_port->hdcp_mst_type1_capable = in hdcp2_authenticate_repeater_topology()
1811 dig_port->hdcp_auth_status = true; in hdcp2_enable_encryption()
2016 mutex_lock(&dig_port->hdcp_mutex); in intel_hdcp2_check_link()
2316 mutex_lock(&dig_port->hdcp_mutex); in intel_hdcp_enable()
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A Dintel_dp_aux.c88 if (dig_port->aux_ch == AUX_CH_A) in ilk_get_aux_clock_divider()
128 to_i915(dig_port->base.base.dev); in g4x_get_aux_send_ctl()
184 to_i915(dig_port->base.base.dev); in intel_dp_aux_xfer()
203 intel_tc_port_lock(dig_port); in intel_dp_aux_xfer()
369 intel_tc_port_unlock(dig_port); in intel_dp_aux_xfer()
478 enum aux_ch aux_ch = dig_port->aux_ch; in g4x_aux_ctl_reg()
495 enum aux_ch aux_ch = dig_port->aux_ch; in g4x_aux_data_reg()
512 enum aux_ch aux_ch = dig_port->aux_ch; in ilk_aux_ctl_reg()
531 enum aux_ch aux_ch = dig_port->aux_ch; in ilk_aux_data_reg()
550 enum aux_ch aux_ch = dig_port->aux_ch; in skl_aux_ctl_reg()
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A Dintel_dp_mst.c368 struct intel_dp *intel_dp = &dig_port->dp; in intel_mst_disable_dp()
394 struct intel_dp *intel_dp = &dig_port->dp; in intel_mst_post_disable_dp()
455 dig_port->base.post_disable(state, &dig_port->base, in intel_mst_post_disable_dp()
469 struct intel_dp *intel_dp = &dig_port->dp; in intel_mst_pre_pll_enable_dp()
472 dig_port->base.pre_pll_enable(state, &dig_port->base, in intel_mst_pre_pll_enable_dp()
509 dig_port->base.pre_enable(state, &dig_port->base, in intel_mst_pre_enable_dp()
611 dig_port->base.get_config(&dig_port->base, pipe_config); in intel_dp_mst_enc_get_config()
898 intel_mst->primary = dig_port; in intel_dp_create_fake_mst_encoder()
949 return dig_port->dp.active_mst_links; in intel_dp_mst_encoder_active_links()
957 enum port port = dig_port->base.port; in intel_dp_mst_encoder_init()
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A Dintel_hdmi.c684 dig_port->read_infoframe(encoder, crtc_state, in intel_read_infoframe()
860 struct intel_hdmi *intel_hdmi = &dig_port->hdmi; in g4x_set_infoframes()
1266 struct intel_hdmi *hdmi = &dig_port->hdmi; in intel_hdmi_hdcp_read()
1295 struct intel_hdmi *hdmi = &dig_port->hdmi; in intel_hdmi_hdcp_write()
1329 struct intel_hdmi *hdmi = &dig_port->hdmi; in intel_hdmi_hdcp_write_an_aksv()
1504 struct intel_hdmi *hdmi = &dig_port->hdmi; in intel_hdmi_hdcp_toggle_signalling()
1537 enum port port = dig_port->base.port; in intel_hdmi_hdcp_check_link_once()
1595 return intel_hdmi_hdcp_read(dig_port, in intel_hdmi_hdcp2_read_rx_status()
1688 struct intel_hdmi *hdmi = &dig_port->hdmi; in intel_hdmi_hdcp2_read_msg()
2811 to_i915(dig_port->base.base.dev); in intel_infoframe_init()
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A Dintel_lspcon.c57 struct intel_digital_port *dig_port = in lspcon_to_intel_dp() local
60 return &dig_port->dp; in lspcon_to_intel_dp()
122 struct intel_digital_port *dig_port = in lspcon_detect_hdr_capability() local
124 struct drm_device *dev = dig_port->base.base.dev; in lspcon_detect_hdr_capability()
506 struct intel_lspcon *lspcon = &dig_port->lspcon; in lspcon_set_infoframes()
637 struct intel_dp *dp = &dig_port->dp; in lspcon_init()
638 struct intel_lspcon *lspcon = &dig_port->lspcon; in lspcon_init()
675 struct intel_lspcon *lspcon = &dig_port->lspcon; in lspcon_resume()
676 struct drm_device *dev = dig_port->base.base.dev; in lspcon_resume()
684 if (!lspcon_init(dig_port)) { in lspcon_resume()
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A Dintel_ddi.c903 dig_port->aux_wakeref = in intel_ddi_get_power_domains()
2678 if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) in intel_ddi_pre_enable()
2956 if (!dig_port->lspcon.active || dig_port->dp.has_hdmi_sink) in intel_enable_ddi_dp()
3226 dig_port->aux_wakeref = in intel_ddi_pre_pll_enable()
3512 if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) in intel_ddi_read_func_ctl()
3946 kfree(dig_port); in intel_ddi_encoder_destroy()
4157 !dig_port->dp.is_mst) in intel_ddi_hotplug()
4426 dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL); in intel_ddi_init()
4427 if (!dig_port) in intel_ddi_init()
4600 dig_port->max_lanes = intel_ddi_max_lanes(dig_port); in intel_ddi_init()
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A Dg4x_hdmi.c346 dig_port->set_infoframes(encoder, in intel_disable_hdmi()
393 dig_port->set_infoframes(encoder, in intel_hdmi_pre_enable()
413 dig_port->set_infoframes(encoder, in vlv_hdmi_pre_enable()
490 dig_port->set_infoframes(encoder, in chv_hdmi_pre_enable()
539 dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL); in g4x_hdmi_init()
540 if (!dig_port) in g4x_hdmi_init()
545 kfree(dig_port); in g4x_hdmi_init()
549 intel_encoder = &dig_port->base; in g4x_hdmi_init()
551 mutex_init(&dig_port->hdcp_mutex); in g4x_hdmi_init()
612 dig_port->max_lanes = 4; in g4x_hdmi_init()
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A Dintel_pps.c61 dig_port->base.base.name)) in vlv_power_sequencer_kick()
67 dig_port->base.base.name); in vlv_power_sequencer_kick()
191 dig_port->base.base.base.id, in vlv_power_sequencer_pipe()
192 dig_port->base.base.name); in vlv_power_sequencer_pipe()
303 dig_port->base.base.name); in vlv_initial_power_sequencer_setup()
310 dig_port->base.base.name, in vlv_initial_power_sequencer_setup()
598 dig_port->base.base.name); in intel_pps_vdd_on_unlocked()
667 dig_port->base.base.name); in intel_pps_vdd_off_sync_unlocked()
832 dig_port->base.base.base.id, dig_port->base.base.name); in intel_pps_off_unlocked()
836 dig_port->base.base.base.id, dig_port->base.base.name); in intel_pps_off_unlocked()
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A Dg4x_dp.c192 dig_port->base.base.base.id, dig_port->base.base.name, in assert_dp_port()
1306 struct intel_digital_port *dig_port; in g4x_dp_init() local
1311 dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL); in g4x_dp_init()
1312 if (!dig_port) in g4x_dp_init()
1319 intel_encoder = &dig_port->base; in g4x_dp_init()
1322 mutex_init(&dig_port->hdcp_mutex); in g4x_dp_init()
1384 dig_port->dp.output_reg = output_reg; in g4x_dp_init()
1385 dig_port->max_lanes = 4; in g4x_dp_init()
1401 dig_port->hpd_pulse = intel_dp_hpd_pulse; in g4x_dp_init()
1416 intel_infoframe_init(dig_port); in g4x_dp_init()
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A Dintel_dp_mst.h15 int intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_id);
16 void intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port);
17 int intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port);
A Dintel_dp.c233 int source_max = dig_port->max_lanes; in intel_dp_max_common_lane_count()
3412 enum port port = dig_port->base.port; in intel_dp_autotest_phy_ddi_enable()
4071 lspcon_resume(dig_port); in intel_dp_detect_dpcd()
4430 intel_aux_power_domain(dig_port); in intel_dp_force()
4522 if (lspcon_init(dig_port)) { in intel_dp_connector_register()
4548 intel_dp_mst_encoder_cleanup(dig_port); in intel_dp_encoder_flush_work()
4755 dig_port->base.base.base.id, in intel_dp_hpd_pulse()
4756 dig_port->base.base.name); in intel_dp_hpd_pulse()
4761 dig_port->base.base.base.id, in intel_dp_hpd_pulse()
4762 dig_port->base.base.name, in intel_dp_hpd_pulse()
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A Dintel_display_types.h386 int (*read_bstatus)(struct intel_digital_port *dig_port,
397 int (*read_ksv_ready)(struct intel_digital_port *dig_port,
401 int (*read_ksv_fifo)(struct intel_digital_port *dig_port,
418 bool (*check_link)(struct intel_digital_port *dig_port,
422 int (*hdcp_capable)(struct intel_digital_port *dig_port,
433 int (*write_2_2_msg)(struct intel_digital_port *dig_port,
437 int (*read_2_2_msg)(struct intel_digital_port *dig_port,
453 int (*check_2_2_link)(struct intel_digital_port *dig_port,
1724 switch (dig_port->base.port) { in vlv_dig_port_to_channel()
1736 vlv_dig_port_to_phy(struct intel_digital_port *dig_port) in vlv_dig_port_to_phy() argument
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A Dintel_dpio_phy.c663 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in chv_set_phy_signal_level() local
665 enum dpio_channel ch = vlv_dig_port_to_channel(dig_port); in chv_set_phy_signal_level()
805 enum dpio_channel ch = vlv_dig_port_to_channel(dig_port); in chv_phy_pre_pll_enable()
816 dig_port->release_cl2_override = in chv_phy_pre_pll_enable()
886 enum dpio_channel ch = vlv_dig_port_to_channel(dig_port); in chv_phy_pre_encoder_enable()
964 if (dig_port->release_cl2_override) { in chv_phy_release_cl2_override()
966 dig_port->release_cl2_override = false; in chv_phy_release_cl2_override()
1012 enum dpio_channel port = vlv_dig_port_to_channel(dig_port); in vlv_set_phy_signal_level()
1039 enum dpio_channel port = vlv_dig_port_to_channel(dig_port); in vlv_phy_pre_pll_enable()
1069 enum dpio_channel port = vlv_dig_port_to_channel(dig_port); in vlv_phy_pre_encoder_enable()
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A Dintel_hotplug.c318 struct intel_digital_port *dig_port; in i915_digport_work_func() local
332 dig_port = enc_to_dig_port(encoder); in i915_digport_work_func()
334 ret = dig_port->hpd_pulse(dig_port, long_hpd); in i915_digport_work_func()
356 void intel_hpd_trigger_irq(struct intel_digital_port *dig_port) in intel_hpd_trigger_irq() argument
358 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_hpd_trigger_irq()
361 i915->hotplug.short_port_mask |= BIT(dig_port->base.port); in intel_hpd_trigger_irq()
A Dintel_lspcon.h18 bool lspcon_init(struct intel_digital_port *dig_port);
20 void lspcon_resume(struct intel_digital_port *dig_port);
A Dintel_hdmi.h26 void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
37 void intel_infoframe_init(struct intel_digital_port *dig_port);
A Dintel_dp.h40 bool intel_dp_init_connector(struct intel_digital_port *dig_port,
63 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
A Dintel_pipe_crc.c81 struct intel_digital_port *dig_port; in i9xx_pipe_crc_auto_source() local
102 dig_port = enc_to_dig_port(encoder); in i9xx_pipe_crc_auto_source()
103 switch (dig_port->base.port) { in i9xx_pipe_crc_auto_source()
115 port_name(dig_port->base.port)); in i9xx_pipe_crc_auto_source()
A Dintel_dp_hdcp.h12 int intel_dp_hdcp_init(struct intel_digital_port *dig_port,
A Dintel_hotplug.h23 void intel_hpd_trigger_irq(struct intel_digital_port *dig_port);
A Dintel_hdcp.h29 struct intel_digital_port *dig_port,
A Dintel_psr.c664 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in dc3co_is_pipe_port_compatible() local
667 enum port port = dig_port->base.port; in dc3co_is_pipe_port_compatible()
1000 struct intel_digital_port *dig_port = enc_to_dig_port(encoder); in intel_psr_get_config() local
1004 if (!dig_port) in intel_psr_get_config()
1007 intel_dp = &dig_port->dp; in intel_psr_get_config()
1175 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_psr_enable_locked() local
1177 enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port); in intel_psr_enable_locked()
1178 struct intel_encoder *encoder = &dig_port->base; in intel_psr_enable_locked()
2183 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_psr_init() local
2198 if (DISPLAY_VER(dev_priv) < 12 && dig_port->base.port != PORT_A) { in intel_psr_init()

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