Searched refs:div_base (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/clk/bcm/ |
| A D | clk-iproc-asiu.c | 37 void __iomem *div_base; member
92 val = readl(asiu->div_base + clk->div.offset); in iproc_asiu_clk_recalc_rate()
142 val = readl(asiu->div_base + clk->div.offset); in iproc_asiu_clk_set_rate()
144 writel(val, asiu->div_base + clk->div.offset); in iproc_asiu_clk_set_rate()
156 val = readl(asiu->div_base + clk->div.offset); in iproc_asiu_clk_set_rate()
172 writel(val, asiu->div_base + clk->div.offset); in iproc_asiu_clk_set_rate()
210 asiu->div_base = of_iomap(node, 0); in iproc_asiu_setup()
211 if (WARN_ON(!asiu->div_base)) in iproc_asiu_setup()
261 iounmap(asiu->div_base); in iproc_asiu_setup()
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| /linux/drivers/pwm/ |
| A D | pwm-samsung.c | 142 bits = (fls(divisor) - 1) - pwm->variant.div_base; in pwm_samsung_set_divisor()
212 for (div = variant->div_base; div < 4; ++div) in pwm_samsung_calc_tin()
220 div = variant->div_base; in pwm_samsung_calc_tin()
454 .div_base = 1,
461 .div_base = 0,
468 .div_base = 0,
475 .div_base = 0,
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| /linux/drivers/clocksource/ |
| A D | samsung_pwm_timer.c | 107 bits = (fls(divisor) - 1) - pwm.variant.div_base; in samsung_timer_set_divisor()
469 .div_base = 1,
482 .div_base = 0,
495 .div_base = 0,
508 .div_base = 0,
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| /linux/include/clocksource/ |
| A D | samsung_pwm.h | 23 u8 div_base; member
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| /linux/arch/arm/mach-s3c/ |
| A D | s3c64xx.c | 171 .div_base = 0,
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| A D | s3c24xx.c | 201 .div_base = 1,
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