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Searched refs:div_hw (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/clk/actions/
A Dowl-divider.c17 const struct owl_divider_hw *div_hw, in owl_divider_helper_round_rate() argument
22 div_hw->table, div_hw->width, in owl_divider_helper_round_rate()
23 div_hw->div_flags); in owl_divider_helper_round_rate()
43 val = reg >> div_hw->shift; in owl_divider_helper_recalc_rate()
44 val &= (1 << div_hw->width) - 1; in owl_divider_helper_recalc_rate()
47 val, div_hw->table, in owl_divider_helper_recalc_rate()
48 div_hw->div_flags, in owl_divider_helper_recalc_rate()
49 div_hw->width); in owl_divider_helper_recalc_rate()
70 div_hw->width, 0); in owl_divider_helper_set_rate()
73 reg &= ~GENMASK(div_hw->width + div_hw->shift - 1, div_hw->shift); in owl_divider_helper_set_rate()
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A Dowl-divider.h25 struct owl_divider_hw div_hw; member
41 .div_hw = OWL_DIVIDER_HW(_reg, _shift, _width, \
60 const struct owl_divider_hw *div_hw,
65 const struct owl_divider_hw *div_hw,
69 const struct owl_divider_hw *div_hw,
A Dowl-composite.h22 struct owl_divider_hw div_hw; member
42 .rate.div_hw = _div, \
56 .rate.div_hw = _div, \
A Dowl-composite.c61 return owl_divider_helper_round_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_round_rate()
70 return owl_divider_helper_recalc_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_recalc_rate()
79 return owl_divider_helper_set_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_set_rate()
/linux/drivers/clk/tegra/
A Dclk-periph.c41 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_recalc_rate() local
43 __clk_hw_set_clk(div_hw, hw); in clk_periph_recalc_rate()
45 return div_ops->recalc_rate(div_hw, parent_rate); in clk_periph_recalc_rate()
53 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_round_rate() local
55 __clk_hw_set_clk(div_hw, hw); in clk_periph_round_rate()
57 return div_ops->round_rate(div_hw, rate, prate); in clk_periph_round_rate()
65 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_set_rate() local
67 __clk_hw_set_clk(div_hw, hw); in clk_periph_set_rate()
69 return div_ops->set_rate(div_hw, rate, parent_rate); in clk_periph_set_rate()
116 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_restore_context() local
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A Dclk-super.c148 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_round_rate() local
150 __clk_hw_set_clk(div_hw, hw); in clk_super_round_rate()
152 return super->div_ops->round_rate(div_hw, rate, parent_rate); in clk_super_round_rate()
159 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_recalc_rate() local
161 __clk_hw_set_clk(div_hw, hw); in clk_super_recalc_rate()
163 return super->div_ops->recalc_rate(div_hw, parent_rate); in clk_super_recalc_rate()
170 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_set_rate() local
172 __clk_hw_set_clk(div_hw, hw); in clk_super_set_rate()
174 return super->div_ops->set_rate(div_hw, rate, parent_rate); in clk_super_set_rate()
180 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_restore_context() local
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/linux/drivers/clk/
A Dclk-bm1880.c601 struct bm1880_div_clock *div = &div_hw->div; in bm1880_clk_div_recalc_rate()
623 struct bm1880_div_clock *div = &div_hw->div; in bm1880_clk_div_round_rate()
645 struct bm1880_div_clock *div = &div_hw->div; in bm1880_clk_div_set_rate()
652 div->width, div_hw->div.flags); in bm1880_clk_div_set_rate()
656 if (div_hw->lock) in bm1880_clk_div_set_rate()
657 spin_lock_irqsave(div_hw->lock, flags); in bm1880_clk_div_set_rate()
659 __acquire(div_hw->lock); in bm1880_clk_div_set_rate()
666 if (div_hw->lock) in bm1880_clk_div_set_rate()
669 __release(div_hw->lock); in bm1880_clk_div_set_rate()
703 kfree(div_hw); in bm1880_clk_unregister_div()
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A Dclk-stm32h7.c351 struct clk_hw *div_hw; member
368 struct clk_hw *div_hw; in get_cfg_composite_div() local
372 mux_hw = div_hw = gate_hw = NULL; in get_cfg_composite_div()
394 div_hw = &div->hw; in get_cfg_composite_div()
415 composite->div_hw = div_hw; in get_cfg_composite_div()
1327 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1350 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1365 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1379 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
A Dclk-stm32mp1.c619 struct clk_hw *mux_hw, *div_hw, *gate_hw; in clk_stm32_register_composite() local
622 div_hw = NULL; in clk_stm32_register_composite()
640 div_hw = _get_stm32_div(dev, base, cfg->div, lock); in clk_stm32_register_composite()
642 if (!IS_ERR(div_hw)) { in clk_stm32_register_composite()
662 mux_hw, mux_ops, div_hw, div_ops, in clk_stm32_register_composite()
/linux/drivers/clk/nxp/
A Dclk-lpc18xx-ccu.c211 struct clk_hw *div_hw = NULL; in lpc18xx_ccu_register_branch_gate_div() local
223 div_hw = &div->hw; in lpc18xx_ccu_register_branch_gate_div()
232 div_hw, div_ops, in lpc18xx_ccu_register_branch_gate_div()
A Dclk-lpc32xx.c1434 struct clk_hw *mux_hw = NULL, *div_hw = NULL, *gate_hw = NULL; in lpc32xx_clk_register() local
1447 div_hw = &div0->clk.hw; in lpc32xx_clk_register()
1456 mux_hw, mops, div_hw, dops, in lpc32xx_clk_register()
/linux/drivers/clk/imx/
A Dclk-composite-8m.c181 struct clk_hw *div_hw, *gate_hw; in __imx8m_clk_hw_composite() local
202 div_hw = &div->hw; in __imx8m_clk_hw_composite()
236 mux_hw, mux_ops, div_hw, in __imx8m_clk_hw_composite()
/linux/drivers/clk/mediatek/
A Dclk-mtk.c171 struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL; in mtk_clk_register_composite() local
227 div_hw = &div->hw; in mtk_clk_register_composite()
233 div_hw, div_ops, in mtk_clk_register_composite()

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