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Searched refs:dlg_vblank_end (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn21/
A Ddcn21_hubp.c357 DLG_V_BLANK_END, &dlg_attr.dlg_vblank_end); in hubp21_validate_dml_output()
371 if (dlg_attr.dlg_vblank_end != dml_dlg_attr->dlg_vblank_end) in hubp21_validate_dml_output()
373 dml_dlg_attr->dlg_vblank_end, dlg_attr.dlg_vblank_end); in hubp21_validate_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_hubp.c89 DLG_V_BLANK_END, dlg_attr->dlg_vblank_end); in hubp2_program_deadline()
1092 DLG_V_BLANK_END, &dlg_attr->dlg_vblank_end); in hubp2_read_state_common()
1397 DLG_V_BLANK_END, &dlg_attr.dlg_vblank_end); in hubp2_validate_dml_output()
1411 if (dlg_attr.dlg_vblank_end != dml_dlg_attr->dlg_vblank_end) in hubp2_validate_dml_output()
1413 dml_dlg_attr->dlg_vblank_end, dlg_attr.dlg_vblank_end); in hubp2_validate_dml_output()
/linux/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_rq_dlg_helpers.c203 dlg_regs->dlg_vblank_end); in print__dlg_regs_st()
A Ddisplay_mode_structs.h446 unsigned int dlg_vblank_end; member
A Ddml1_display_rq_dlg_calc.c1160 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; /* 15 bits */ in dml1_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_hubp.c596 DLG_V_BLANK_END, dlg_attr->dlg_vblank_end); in hubp1_program_deadline()
905 DLG_V_BLANK_END, &dlg_attr->dlg_vblank_end); in hubp1_read_state_common()
A Ddcn10_hw_sequencer_debug.c260 …pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_… in dcn10_get_dlg_states()
A Ddcn10_hw_sequencer.c236 …pool->hubps[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_… in dcn10_log_hubp_states()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_rq_dlg_calc_20.c933 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml20_rq_dlg_get_dlg_params()
A Ddisplay_rq_dlg_calc_20v2.c933 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml20v2_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_rq_dlg_calc_21.c979 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_rq_dlg_calc_30.c1138 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_rq_dlg_calc_31.c1075 disp_dlg_regs->dlg_vblank_end = interlaced ? (vblank_end / 2) : vblank_end; // 15 bits in dml_rq_dlg_get_dlg_params()

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