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Searched refs:dmacr (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/tty/serial/
A Damba-pl011.c555 u16 dmacr; in pl011_dma_tx_callback() local
562 dmacr = uap->dmacr; in pl011_dma_tx_callback()
563 uap->dmacr = dmacr & ~UART011_TXDMAE; in pl011_dma_tx_callback()
677 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_refill()
713 uap->dmacr |= UART011_TXDMAE; in pl011_dma_tx_irq()
754 u16 dmacr; in pl011_dma_tx_start() local
780 dmacr = uap->dmacr; in pl011_dma_tx_start()
781 uap->dmacr &= ~UART011_TXDMAE; in pl011_dma_tx_start()
798 uap->dmacr = dmacr; in pl011_dma_tx_start()
864 uap->dmacr |= UART011_RXDMAE; in pl011_dma_rx_trigger_dma()
[all …]
/linux/drivers/ata/
A Dsata_dwc_460ex.c71 u32 dmacr; /* DMA Control */ member
731 u32 dmacr = sata_dwc_readl(&hsdev->sata_dwc_regs->dmacr); in sata_dwc_clear_dmacr() local
734 dmacr = SATA_DWC_DMACR_RX_CLEAR(dmacr); in sata_dwc_clear_dmacr()
735 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr); in sata_dwc_clear_dmacr()
737 dmacr = SATA_DWC_DMACR_TX_CLEAR(dmacr); in sata_dwc_clear_dmacr()
738 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, dmacr); in sata_dwc_clear_dmacr()
747 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, in sata_dwc_clear_dmacr()
932 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, in sata_dwc_port_start()
1054 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, in sata_dwc_bmdma_start_by_tag()
1057 sata_dwc_writel(&hsdev->sata_dwc_regs->dmacr, in sata_dwc_bmdma_start_by_tag()
[all …]
/linux/drivers/video/fbdev/
A Dimxfb.c167 u_int dmacr; member
648 if (fbi->dmacr) in imxfb_activate_var()
649 writel(fbi->dmacr, fbi->regs + LCDC_DMACR); in imxfb_activate_var()
695 fbi->dmacr = pdata->dmacr; in imxfb_init_fbinfo()
710 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr); in imxfb_init_fbinfo()
/linux/drivers/dma/xilinx/
A Dxilinx_dma.c2500 u32 dmacr; in xilinx_vdma_channel_set_config() local
2505 dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_vdma_channel_set_config()
2514 dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2516 dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2517 dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK; in xilinx_vdma_channel_set_config()
2518 dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; in xilinx_vdma_channel_set_config()
2533 dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK; in xilinx_vdma_channel_set_config()
2539 dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK; in xilinx_vdma_channel_set_config()
2540 dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; in xilinx_vdma_channel_set_config()
2545 dmacr &= ~XILINX_DMA_DMACR_FSYNCSRC_MASK; in xilinx_vdma_channel_set_config()
[all …]
/linux/include/linux/fsl/
A Dguts.h106 u32 dmacr; /* 0x.0908 - DMA Control Register */ member
160 clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift); in guts_set_dmacr()
/linux/drivers/crypto/ux500/cryp/
A Dcryp_irqp.h89 u32 dmacr; /* Dma control register */ member
A Dcryp.h185 u32 dmacr; member
A Dcryp.c199 CRYP_SET_BITS(&device_data->base->dmacr, in cryp_configure_for_dma()
A Dcryp_core.c374 writel_relaxed(CRYP_DMACR_DEFAULT, &device_data->base->dmacr); in cryp_setup_context()
/linux/include/linux/platform_data/
A Dvideo-imxfb.h64 u_int dmacr; member
/linux/drivers/spi/
A Dspi-rockchip.c502 u32 dmacr = 0; in rockchip_spi_config() local
547 dmacr |= TF_DMA_EN; in rockchip_spi_config()
549 dmacr |= RF_DMA_EN; in rockchip_spi_config()
567 writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); in rockchip_spi_config()
A Dspi-pl022.c422 u16 dmacr; member
561 writew(chip->dmacr, SSP_DMACR(pl022->virtbase)); in restore_state()
1964 chip->dmacr = 0; in pl022_setup()
1970 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, in pl022_setup()
1972 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_ENABLED, in pl022_setup()
1977 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED, in pl022_setup()
1979 SSP_WRITE_BITS(chip->dmacr, SSP_DMA_DISABLED, in pl022_setup()
/linux/Documentation/devicetree/bindings/display/imx/
A Dfsl,imx-fb.txt21 - fsl,dmacr: DMA Control Register value. This is optional. By default, the
/linux/drivers/dma/
A Dmpc512x_dma.c95 u32 dmacr; /* DMA control register */ member
1023 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_ERCA); in mpc_dma_probe()
1034 out_be32(&mdma->regs->dmacr, MPC_DMA_DMACR_EDCG | in mpc_dma_probe()
/linux/arch/arm/boot/dts/
A Dimx27-apf27dev.dts101 fsl,dmacr = <0x00020010>;
A Dimx27-eukrea-mbimxsd27-baseboard.dts98 fsl,dmacr = <0x00040060>;
A Dimx27-phytec-phycore-rdk.dts77 fsl,dmacr = <0x00020010>;
A Dimx25-pdk.dts252 fsl,dmacr = <0x00020010>;
/linux/drivers/net/ethernet/intel/i40e/
A Di40e_adminq_cmd.h425 __le32 dmacr; member

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