| /linux/drivers/gpu/drm/amd/display/dmub/src/ |
| A D | dmub_srv.c | 255 dmub_memset(dmub, 0, sizeof(*dmub)); in dmub_srv_create()
302 dmub_memset(dmub, 0, sizeof(*dmub)); in dmub_srv_destroy()
474 dmub->hw_funcs.reset(dmub); in dmub_srv_hw_init()
540 dmub->hw_funcs.setup_mailbox(dmub, &inbox1); in dmub_srv_hw_init()
567 dmub->hw_funcs.reset_release(dmub); in dmub_srv_hw_init()
580 dmub->hw_funcs.reset(dmub); in dmub_srv_hw_reset()
611 dmub->hw_funcs.set_inbox1_wptr(dmub, dmub->inbox1_rb.wrpt); in dmub_srv_cmd_execute()
647 if (dmub->hw_funcs.is_phy_init(dmub)) in dmub_srv_wait_for_phy_init()
702 dmub->hw_funcs.set_gpint(dmub, reg); in dmub_srv_send_gpint_command()
814 dmub->outbox0_rb.wrpt = dmub->hw_funcs.get_outbox0_wptr(dmub); in dmub_srv_get_outbox0_msg()
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| A D | dmub_dcn20.c | 36 #define CTX dmub
37 #define REGS dmub->regs
66 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn20_get_fb_base_offset()
67 *fb_base = dmub->fb_base; in dmub_dcn20_get_fb_base_offset()
68 *fb_offset = dmub->fb_offset; in dmub_dcn20_get_fb_base_offset()
107 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn20_reset()
119 if (dmub->hw_funcs.is_gpint_acked(dmub, cmd)) in dmub_dcn20_reset()
124 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn20_reset()
131 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn20_reset()
277 if (dmub_dcn20_use_cached_inbox(dmub)) in dmub_dcn20_setup_mailbox()
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| A D | dmub_dcn31.c | 35 #define CTX dmub
36 #define REGS dmub->regs_dcn31
62 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn31_get_fb_base_offset()
63 *fb_base = dmub->fb_base; in dmub_dcn31_get_fb_base_offset()
64 *fb_offset = dmub->fb_offset; in dmub_dcn31_get_fb_base_offset()
83 void dmub_dcn31_reset(struct dmub_srv *dmub) in dmub_dcn31_reset() argument
96 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn31_reset()
104 if (dmub->hw_funcs.is_gpint_acked(dmub, cmd)) in dmub_dcn31_reset()
111 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn31_reset()
132 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn31_reset()
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| A D | dmub_dcn20.h | 185 void dmub_dcn20_init(struct dmub_srv *dmub);
187 void dmub_dcn20_reset(struct dmub_srv *dmub);
189 void dmub_dcn20_reset_release(struct dmub_srv *dmub);
191 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub,
195 void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
202 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub,
216 void dmub_dcn20_setup_outbox0(struct dmub_srv *dmub,
223 bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub);
225 bool dmub_dcn20_is_supported(struct dmub_srv *dmub);
227 void dmub_dcn20_set_gpint(struct dmub_srv *dmub,
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| A D | dmub_dcn31.h | 186 void dmub_dcn31_init(struct dmub_srv *dmub);
188 void dmub_dcn31_reset(struct dmub_srv *dmub);
190 void dmub_dcn31_reset_release(struct dmub_srv *dmub);
192 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub,
196 void dmub_dcn31_setup_windows(struct dmub_srv *dmub,
203 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub,
217 bool dmub_dcn31_is_hw_init(struct dmub_srv *dmub);
219 bool dmub_dcn31_is_supported(struct dmub_srv *dmub);
221 void dmub_dcn31_set_gpint(struct dmub_srv *dmub,
224 bool dmub_dcn31_is_gpint_acked(struct dmub_srv *dmub,
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| A D | dmub_srv_stat.c | 46 enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub, in dmub_srv_stat_get_notification() argument
56 if (!dmub->hw_init) { in dmub_srv_stat_get_notification()
63 dmub->outbox1_rb.wrpt = dmub->hw_funcs.get_outbox1_wptr(dmub); in dmub_srv_stat_get_notification()
65 if (!dmub_rb_out_front(&dmub->outbox1_rb, &cmd)) { in dmub_srv_stat_get_notification()
101 dmub_rb_pop_front(&dmub->outbox1_rb); in dmub_srv_stat_get_notification()
102 dmub->hw_funcs.set_outbox1_rptr(dmub, dmub->outbox1_rb.rptr); in dmub_srv_stat_get_notification()
108 if (dmub_rb_empty(&dmub->outbox1_rb)) in dmub_srv_stat_get_notification()
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| A D | dmub_dcn30.c | 36 #define CTX dmub
37 #define REGS dmub->regs
60 static void dmub_dcn30_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn30_get_fb_base_offset() argument
66 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn30_get_fb_base_offset()
67 *fb_base = dmub->fb_base; in dmub_dcn30_get_fb_base_offset()
68 *fb_offset = dmub->fb_offset; in dmub_dcn30_get_fb_base_offset()
87 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub, in dmub_dcn30_backdoor_load() argument
94 dmub_dcn30_get_fb_base_offset(dmub, &fb_base, &fb_offset); in dmub_dcn30_backdoor_load()
122 void dmub_dcn30_setup_windows(struct dmub_srv *dmub, in dmub_dcn30_setup_windows() argument
161 if (dmub_dcn20_use_cached_inbox(dmub)) { in dmub_dcn30_setup_windows()
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| A D | dmub_dcn21.c | 35 #define CTX dmub
36 #define REGS dmub->regs
59 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub) in dmub_dcn21_is_phy_init() argument
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| A D | dmub_dcn30.h | 37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
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| A D | dmub_dcn301.c | 35 #define CTX dmub
36 #define REGS dmub->regs
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| A D | dmub_dcn302.c | 35 #define CTX dmub
36 #define REGS dmub->regs
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| A D | dmub_dcn303.c | 17 #define CTX dmub
18 #define REGS dmub->regs
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| A D | dmub_dcn21.h | 37 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub);
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| A D | Makefile | 27 AMD_DAL_DMUB = $(addprefix $(AMDDALPATH)/dmub/src/,$(DMUB))
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_dmub_srv.c | 37 dc_srv->dmub = dmub; in dc_dmub_srv_construct()
67 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_queue() local
94 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_execute() local
107 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_wait_idle() local
121 struct dmub_srv *dmub = dmub_srv->dmub; in dc_dmub_srv_send_inbox0_cmd() local
123 dmub->hw_funcs.send_inbox0_cmd(dmub, data); in dc_dmub_srv_send_inbox0_cmd()
135 dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_with_reply_data()
148 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_wait_phy_init() local
182 dmub = dc_dmub_srv->dmub; in dc_dmub_srv_notify_stream_mask()
199 dmub = dc_dmub_srv->dmub; in dc_dmub_srv_is_restore_required()
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| A D | dc_dmub_srv.h | 44 struct dmub_srv *dmub; member
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| A D | dm_services.h | 126 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub);
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| /linux/drivers/gpu/drm/amd/display/dmub/ |
| A D | dmub_srv.h | 298 void (*init)(struct dmub_srv *dmub);
300 void (*reset)(struct dmub_srv *dmub);
304 void (*backdoor_load)(struct dmub_srv *dmub,
308 void (*setup_windows)(struct dmub_srv *dmub,
315 void (*setup_mailbox)(struct dmub_srv *dmub,
329 void (*setup_outbox0)(struct dmub_srv *dmub,
340 bool (*is_supported)(struct dmub_srv *dmub);
342 bool (*is_hw_init)(struct dmub_srv *dmub);
344 bool (*is_phy_init)(struct dmub_srv *dmub);
353 void (*set_gpint)(struct dmub_srv *dmub,
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| A D | dmub_srv_stat.h | 38 enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub,
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dmub_psr.c | 86 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_psr_get_state()
124 struct dc_context *dc = dmub->ctx; in dmub_psr_set_version()
158 struct dc_context *dc = dmub->ctx; in dmub_psr_enable()
211 struct dc_context *dc = dmub->ctx; in dmub_psr_set_level()
213 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_set_level()
236 struct dc_context *dc = dmub->ctx; in dmub_psr_set_power_opt()
258 struct dc_context *dc = dmub->ctx; in dmub_psr_copy_settings()
344 struct dc_context *dc = dmub->ctx; in dmub_psr_force_static()
364 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_psr_get_residency()
414 kfree(*dmub); in dmub_psr_destroy()
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| A D | dmub_psr.h | 38 bool (*psr_copy_settings)(struct dmub_psr *dmub, struct dc_link *link,
40 void (*psr_enable)(struct dmub_psr *dmub, bool enable, bool wait,
42 void (*psr_get_state)(struct dmub_psr *dmub, enum dc_psr_state *dc_psr_state,
44 void (*psr_set_level)(struct dmub_psr *dmub, uint16_t psr_level,
46 void (*psr_force_static)(struct dmub_psr *dmub, uint8_t panel_inst);
47 void (*psr_get_residency)(struct dmub_psr *dmub, uint32_t *residency,
49 void (*psr_set_power_opt)(struct dmub_psr *dmub, unsigned int power_opt);
53 void dmub_psr_destroy(struct dmub_psr **dmub);
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| A D | dmub_abm.c | 183 dmub_flush_buffer_mem(&dc->dmub_srv->dmub->scratch_mem_fb); in dmub_abm_init_config()
186 memcpy(dc->dmub_srv->dmub->scratch_mem_fb.cpu_addr, (void *)src, bytes); in dmub_abm_init_config()
192 …cmd.abm_init_config.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_ad… in dmub_abm_init_config()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_stat.c | 59 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_notification() local
62 status = dmub_srv_stat_get_notification(dmub, notify); in dc_stat_get_dmub_notification()
91 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_dataout() local
94 status = dmub_srv_get_gpint_dataout(dmub, dataout); in dc_stat_get_dmub_dataout()
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| /linux/drivers/gpu/drm/amd/display/ |
| A D | Makefile | 37 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dmub/inc
46 DAL_LIBS = amdgpu_dm dc modules/freesync modules/color modules/info_packet modules/power dmub/src
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_dio_link_encoder.c | 374 struct dc_dmub_srv *dmub = dc_ctx->dmub_srv; in link_dpia_control() local
387 dc_dmub_srv_cmd_queue(dmub, &cmd); in link_dpia_control()
388 dc_dmub_srv_cmd_execute(dmub); in link_dpia_control()
389 dc_dmub_srv_wait_idle(dmub); in link_dpia_control()
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