| /linux/drivers/gpu/drm/amd/display/dmub/ |
| A D | dmub_srv.h | 74 struct dmub_srv;
298 void (*init)(struct dmub_srv *dmub);
300 void (*reset)(struct dmub_srv *dmub);
304 void (*backdoor_load)(struct dmub_srv *dmub,
308 void (*setup_windows)(struct dmub_srv *dmub,
315 void (*setup_mailbox)(struct dmub_srv *dmub,
329 void (*setup_outbox0)(struct dmub_srv *dmub,
342 bool (*is_hw_init)(struct dmub_srv *dmub);
344 bool (*is_phy_init)(struct dmub_srv *dmub);
353 void (*set_gpint)(struct dmub_srv *dmub,
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| /linux/drivers/gpu/drm/amd/display/dmub/src/ |
| A D | dmub_dcn20.h | 31 struct dmub_srv;
185 void dmub_dcn20_init(struct dmub_srv *dmub);
187 void dmub_dcn20_reset(struct dmub_srv *dmub);
189 void dmub_dcn20_reset_release(struct dmub_srv *dmub);
191 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub,
195 void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
202 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub,
216 void dmub_dcn20_setup_outbox0(struct dmub_srv *dmub,
223 bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub);
225 bool dmub_dcn20_is_supported(struct dmub_srv *dmub);
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| A D | dmub_dcn31.h | 31 struct dmub_srv;
186 void dmub_dcn31_init(struct dmub_srv *dmub);
188 void dmub_dcn31_reset(struct dmub_srv *dmub);
190 void dmub_dcn31_reset_release(struct dmub_srv *dmub);
192 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub,
196 void dmub_dcn31_setup_windows(struct dmub_srv *dmub,
203 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub,
217 bool dmub_dcn31_is_hw_init(struct dmub_srv *dmub);
219 bool dmub_dcn31_is_supported(struct dmub_srv *dmub);
221 void dmub_dcn31_set_gpint(struct dmub_srv *dmub,
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| A D | dmub_dcn31.c | 83 void dmub_dcn31_reset(struct dmub_srv *dmub) in dmub_dcn31_reset()
135 void dmub_dcn31_reset_release(struct dmub_srv *dmub) in dmub_dcn31_reset_release()
143 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub, in dmub_dcn31_backdoor_load()
176 void dmub_dcn31_setup_windows(struct dmub_srv *dmub, in dmub_dcn31_setup_windows()
229 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub, in dmub_dcn31_setup_mailbox()
271 bool dmub_dcn31_is_hw_init(struct dmub_srv *dmub) in dmub_dcn31_is_hw_init()
282 bool dmub_dcn31_is_supported(struct dmub_srv *dmub) in dmub_dcn31_is_supported()
291 void dmub_dcn31_set_gpint(struct dmub_srv *dmub, in dmub_dcn31_set_gpint()
297 bool dmub_dcn31_is_gpint_acked(struct dmub_srv *dmub, in dmub_dcn31_is_gpint_acked()
358 void dmub_dcn31_setup_outbox0(struct dmub_srv *dmub, in dmub_dcn31_setup_outbox0()
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| A D | dmub_dcn20.c | 87 bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub) in dmub_dcn20_use_cached_inbox()
94 void dmub_dcn20_reset(struct dmub_srv *dmub) in dmub_dcn20_reset()
146 void dmub_dcn20_reset_release(struct dmub_srv *dmub) in dmub_dcn20_reset_release()
154 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub, in dmub_dcn20_backdoor_load()
189 void dmub_dcn20_setup_windows(struct dmub_srv *dmub, in dmub_dcn20_setup_windows()
273 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub, in dmub_dcn20_setup_mailbox()
325 void dmub_dcn20_setup_outbox0(struct dmub_srv *dmub, in dmub_dcn20_setup_outbox0()
343 bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub) in dmub_dcn20_is_hw_init()
352 bool dmub_dcn20_is_supported(struct dmub_srv *dmub) in dmub_dcn20_is_supported()
361 void dmub_dcn20_set_gpint(struct dmub_srv *dmub, in dmub_dcn20_set_gpint()
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| A D | dmub_srv.c | 250 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, in dmub_srv_create()
300 void dmub_srv_destroy(struct dmub_srv *dmub) in dmub_srv_destroy()
306 dmub_srv_calc_region_info(struct dmub_srv *dmub, in dmub_srv_calc_region_info()
381 enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub, in dmub_srv_calc_fb_info()
444 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, in dmub_srv_hw_init()
574 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub) in dmub_srv_hw_reset()
587 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub, in dmub_srv_cmd_queue()
599 enum dmub_status dmub_srv_cmd_execute(struct dmub_srv *dmub) in dmub_srv_cmd_execute()
656 enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub, in dmub_srv_wait_for_idle()
682 dmub_srv_send_gpint_command(struct dmub_srv *dmub, in dmub_srv_send_gpint_command()
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| A D | dmub_reg.h | 31 struct dmub_srv;
115 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n,
118 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
121 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
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| A D | dmub_dcn30.h | 37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
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| A D | dmub_reg.c | 72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update()
89 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, in dmub_reg_set()
104 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift, in dmub_reg_get()
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| A D | dmub_dcn30.c | 60 static void dmub_dcn30_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn30_get_fb_base_offset()
87 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub, in dmub_dcn30_backdoor_load()
122 void dmub_dcn30_setup_windows(struct dmub_srv *dmub, in dmub_dcn30_setup_windows()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| A D | dc_dmub_srv.c | 35 struct dmub_srv *dmub) in dc_dmub_srv_construct()
58 if (*dmub_srv) { in dc_dmub_srv_destroy()
59 kfree(*dmub_srv); in dc_dmub_srv_destroy()
60 *dmub_srv = NULL; in dc_dmub_srv_destroy()
67 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_queue()
94 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_execute()
121 struct dmub_srv *dmub = dmub_srv->dmub; in dc_dmub_srv_send_inbox0_cmd()
129 struct dmub_srv *dmub; in dc_dmub_srv_cmd_with_reply_data()
176 struct dmub_srv *dmub; in dc_dmub_srv_notify_stream_mask()
191 struct dmub_srv *dmub; in dc_dmub_srv_is_restore_required()
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| A D | dc_helper.c | 154 dc_dmub_srv_cmd_execute(ctx->dmub_srv); in dmub_flush_buffer_execute()
162 dc_dmub_srv_cmd_execute(ctx->dmub_srv); in dmub_flush_burst_write_buffer_execute()
259 if (ctx->dmub_srv && in generic_reg_update_ex()
290 if (ctx->dmub_srv && in generic_reg_set_ex()
459 if (ctx->dmub_srv && in generic_reg_wait()
519 if (ctx->dmub_srv && in generic_read_indirect_reg()
600 &ctx->dmub_srv->reg_helper_offload; in reg_sequence_start_gather()
613 if (!ctx->dmub_srv) in reg_sequence_start_execute()
635 dc_dmub_srv_cmd_execute(ctx->dmub_srv); in reg_sequence_start_execute()
644 if (!ctx->dmub_srv) in reg_sequence_wait_done()
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| A D | dc_dmub_srv.h | 32 struct dmub_srv;
44 struct dmub_srv *dmub;
71 void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data…
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| A D | dm_services.h | 41 struct dmub_srv;
126 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub);
127 void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv);
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dmub_psr.c | 86 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_psr_get_state()
146 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_psr_set_version()
147 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_version()
176 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_psr_enable()
177 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_enable()
226 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_psr_set_level()
227 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_level()
246 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_power_opt()
333 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_copy_settings()
356 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_force_static()
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| A D | dmub_abm.c | 74 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_enable_fractional_pwm()
75 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_enable_fractional_pwm()
76 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_enable_fractional_pwm()
166 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_set_level()
167 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_set_level()
168 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_set_level()
199 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_init_config()
200 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_init_config()
201 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_init_config()
220 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_set_pause()
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| A D | dmub_hw_lock_mgr.c | 31 void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv, in dmub_hw_lock_mgr_cmd() argument
50 dc_dmub_srv_cmd_queue(dmub_srv, &cmd); in dmub_hw_lock_mgr_cmd()
51 dc_dmub_srv_cmd_execute(dmub_srv); in dmub_hw_lock_mgr_cmd()
52 dc_dmub_srv_wait_idle(dmub_srv); in dmub_hw_lock_mgr_cmd()
55 void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv, in dmub_hw_lock_mgr_inbox0_cmd() argument
60 dc_dmub_srv_send_inbox0_cmd(dmub_srv, data); in dmub_hw_lock_mgr_inbox0_cmd()
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| A D | dmub_outbox.c | 48 dc_dmub_srv_cmd_queue(dc_ctx->dmub_srv, &cmd); in dmub_enable_outbox_notification()
49 dc_dmub_srv_cmd_execute(dc_ctx->dmub_srv); in dmub_enable_outbox_notification()
50 dc_dmub_srv_wait_idle(dc_ctx->dmub_srv); in dmub_enable_outbox_notification()
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| A D | dmub_hw_lock_mgr.h | 32 void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv,
37 void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv,
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_stat.c | 59 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_notification()
91 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_dataout()
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| A D | command_table2.c | 183 if (bp->base.ctx->dc->ctx->dmub_srv && in encoder_control_digx_v1_5()
199 if (bp->base.ctx->dc->ctx->dmub_srv && in encoder_control_fallback()
300 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_v1_6()
373 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_v1_7()
389 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_fallback()
521 if (bp->base.ctx->dc->ctx->dmub_srv && in set_pixel_clock_v7()
537 if (bp->base.ctx->dc->ctx->dmub_srv && in set_pixel_clock_fallback()
835 if (bp->base.ctx->dc->ctx->dmub_srv && in enable_disp_power_gating_v2_1()
853 if (bp->base.ctx->dc->ctx->dmub_srv && in enable_disp_power_gating_fallback()
1032 if (bp->base.ctx->dc->ctx->dmub_srv && in enable_lvtma_control()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_hwseq.c | 155 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_set_pipe()
156 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_set_pipe()
157 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_set_pipe()
225 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dcn21_set_backlight_level()
226 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dcn21_set_backlight_level()
227 dc_dmub_srv_wait_idle(dc->dmub_srv); in dcn21_set_backlight_level()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_hwseq.c | 742 if (!dc->ctx->dmub_srv) in dcn30_apply_idle_power_optimizations()
763 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
764 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
886 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
887 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
888 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
904 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
905 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
922 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
923 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_hwseq.c | 431 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn31_z10_save_init()
432 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn31_z10_save_init()
433 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn31_z10_save_init()
444 if (!dc_dmub_srv_is_restore_required(dc->ctx->dmub_srv)) in dcn31_z10_restore()
451 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn31_z10_restore()
452 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn31_z10_restore()
453 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn31_z10_restore()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm.h | 76 struct dmub_srv;
257 struct dmub_srv *dmub_srv; member
|