Searched refs:dpcd_val (Results 1 – 2 of 2) sorted by relevance
838 u8 dpcd_val; in ti_sn_bridge_read_valid_rates() local842 ret = drm_dp_dpcd_readb(&pdata->aux, DP_EDP_DPCD_REV, &dpcd_val); in ti_sn_bridge_read_valid_rates()846 dpcd_val = DP_EDP_11; in ti_sn_bridge_read_valid_rates()849 if (dpcd_val >= DP_EDP_14) { in ti_sn_bridge_read_valid_rates()888 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LINK_RATE, &dpcd_val); in ti_sn_bridge_read_valid_rates()893 dpcd_val = DP_LINK_BW_5_4; in ti_sn_bridge_read_valid_rates()896 switch (dpcd_val) { in ti_sn_bridge_read_valid_rates()900 (int)dpcd_val); in ti_sn_bridge_read_valid_rates()
371 u8 dpcd_val = DP_PSR_ENABLE; in intel_psr_enable_sink() local379 dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS; in intel_psr_enable_sink()382 dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE; in intel_psr_enable_sink()385 dpcd_val |= DP_PSR_CRC_VERIFICATION; in intel_psr_enable_sink()389 dpcd_val |= DP_PSR_SU_REGION_SCANLINE_CAPTURE; in intel_psr_enable_sink()391 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val); in intel_psr_enable_sink()
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