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Searched refs:dram_type (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/ast/
A Dast_main.c306 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()
322 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()
326 ast->dram_type = AST_DRAM_2Gx16; in ast_get_dram_info()
329 ast->dram_type = AST_DRAM_4Gx16; in ast_get_dram_info()
332 ast->dram_type = AST_DRAM_8Gx16; in ast_get_dram_info()
338 ast->dram_type = AST_DRAM_512Mx16; in ast_get_dram_info()
342 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()
345 ast->dram_type = AST_DRAM_2Gx16; in ast_get_dram_info()
348 ast->dram_type = AST_DRAM_4Gx16; in ast_get_dram_info()
359 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()
[all …]
A Dast_post.c318 if (ast->dram_type == AST_DRAM_1Gx16) in ast_init_dram_reg()
320 else if (ast->dram_type == AST_DRAM_1Gx32) in ast_init_dram_reg()
402 u32 dram_type; member
1626 param.dram_type = AST_DDR3; in ast_post_chip_2300()
1629 param.dram_type = AST_DDR2; in ast_post_chip_2300()
1664 if (param.dram_type == AST_DDR3) { in ast_post_chip_2300()
A Dast_drv.h158 uint32_t dram_type; member
/linux/drivers/memory/tegra/
A Dtegra210-emc-cc-r21021.c619 u32 value, dram_type; in tegra210_emc_r21021_set_clock() local
638 dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
641 if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()
645 (dram_type == DRAM_TYPE_LPDDR2)) in tegra210_emc_r21021_set_clock()
874 if (dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
899 if (dram_type == DRAM_TYPE_LPDDR4) { in tegra210_emc_r21021_set_clock()
992 if (dram_type == DRAM_TYPE_LPDDR4) { in tegra210_emc_r21021_set_clock()
1075 if (dram_type == DRAM_TYPE_LPDDR4) { in tegra210_emc_r21021_set_clock()
1263 if (dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
1588 if (dram_type != DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()
[all …]
A Dtegra124-emc.c490 enum emc_dram_type dram_type; member
629 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()
724 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra_emc_prepare_timing_change()
757 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()
766 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()
774 if (emc->dram_type == DRAM_TYPE_DDR3) { in tegra_emc_prepare_timing_change()
849 if (emc->dram_type == DRAM_TYPE_LPDDR3 && in tegra_emc_complete_timing_change()
857 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra_emc_complete_timing_change()
901 emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); in emc_init()
910 emc->dram_type &= EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_init()
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A Dtegra30-emc.c512 enum emc_dram_type dram_type; in emc_prepare_timing_change() local
557 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_prepare_timing_change()
633 if (dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_ON) { in emc_prepare_timing_change()
686 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()
716 if (dram_type == DRAM_TYPE_DDR3) in emc_prepare_timing_change()
721 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()
1042 enum emc_dram_type dram_type; in emc_setup_hw() local
1045 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_setup_hw()
1053 switch (dram_type) { in emc_setup_hw()
A Dtegra20-emc.c601 enum emc_dram_type dram_type; in emc_setup_hw() local
641 dram_type = FIELD_GET(EMC_FBIO_CFG5_DRAM_TYPE, emc_fbio); in emc_setup_hw()
643 switch (dram_type) { in emc_setup_hw()
665 if (dram_type == DRAM_TYPE_LPDDR2) { in emc_setup_hw()
A Dtegra210-emc-core.c772 if ((emc->dram_type != DRAM_TYPE_LPDDR2 && in tegra210_emc_set_refresh()
773 emc->dram_type != DRAM_TYPE_LPDDR4) || in tegra210_emc_set_refresh()
1787 emc->dram_type = value & 0x3; in tegra210_emc_detect()
A Dtegra210-emc.h908 unsigned int dram_type; member
/linux/arch/mips/ralink/
A Dmt7620.c50 static int dram_type; variable
162 if (dram_type == SYSCFG0_DRAM_TYPE_SDRAM) in mt7620_get_dram_rate()
284 switch (dram_type) { in mt7620_dram_init()
310 switch (dram_type) { in mt7628_dram_init()
377 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()
379 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()
381 if (dram_type == SYSCFG0_DRAM_TYPE_UNKNOWN) in prom_soc_init()
382 dram_type = SYSCFG0_DRAM_TYPE_SDRAM; in prom_soc_init()
/linux/drivers/edac/
A Daspeed_edac.c234 u32 nr_pages, dram_type; in init_csrows() local
265 dram_type = (reg04 & ASPEED_MCR_CONF_DRAM_TYPE) ? MEM_DDR4 : MEM_DDR3; in init_csrows()
268 dimm->mtype = dram_type; in init_csrows()
A Damd64_edac.c1350 pvt->dram_type = MEM_LRDDR4; in determine_memory_type()
1352 pvt->dram_type = MEM_RDDR4; in determine_memory_type()
1354 pvt->dram_type = MEM_DDR4; in determine_memory_type()
1390 pvt->dram_type = MEM_DDR4; in determine_memory_type()
1392 pvt->dram_type = MEM_DDR3; in determine_memory_type()
1394 pvt->dram_type = MEM_LRDDR3; in determine_memory_type()
1396 pvt->dram_type = MEM_RDDR3; in determine_memory_type()
1405 pvt->dram_type = MEM_EMPTY; in determine_memory_type()
1835 if (pvt->dram_type == MEM_DDR4) { in f15_m60h_dbam_to_chip_select()
3256 dimm->mtype = pvt->dram_type; in init_csrows_df()
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A Damd64_edac.h389 enum mem_type dram_type; member

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