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Searched refs:dsc_cfg (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/
A Ddrm_dsc.c109 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
116 dsc_cfg->line_buf_depth | in drm_dsc_pps_payload_pack()
156 ((dsc_cfg->initial_xmit_delay & in drm_dsc_pps_payload_pack()
172 dsc_cfg->initial_scale_value; in drm_dsc_pps_payload_pack()
180 ((dsc_cfg->scale_decrement_interval & in drm_dsc_pps_payload_pack()
192 dsc_cfg->first_line_bpg_offset; in drm_dsc_pps_payload_pack()
196 cpu_to_be16(dsc_cfg->nfl_bpg_offset); in drm_dsc_pps_payload_pack()
223 dsc_cfg->rc_quant_incr_limit0; in drm_dsc_pps_payload_pack()
227 dsc_cfg->rc_quant_incr_limit1; in drm_dsc_pps_payload_pack()
236 dsc_cfg->rc_buf_thresh[i]; in drm_dsc_pps_payload_pack()
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/linux/drivers/gpu/drm/amd/display/dc/dsc/
A Drc_calc_dpi.c89 dsc_cfg->rc_model_size = rc->rc_model_size; in copy_rc_to_cfg()
90 dsc_cfg->rc_edge_factor = rc->rc_edge_factor; in copy_rc_to_cfg()
91 dsc_cfg->rc_tgt_offset_high = rc->rc_tgt_offset_hi; in copy_rc_to_cfg()
92 dsc_cfg->rc_tgt_offset_low = rc->rc_tgt_offset_lo; in copy_rc_to_cfg()
95 dsc_cfg->rc_buf_thresh[i] = rc->rc_buf_thresh[i]; in copy_rc_to_cfg()
102 struct drm_dsc_config dsc_cfg; in dscc_compute_dsc_parameters() local
110 copy_pps_fields(&dsc_cfg, &dsc_params->pps); in dscc_compute_dsc_parameters()
111 copy_rc_to_cfg(&dsc_cfg, &rc); in dscc_compute_dsc_parameters()
115 ret = drm_dsc_compute_rc_parameters(&dsc_cfg); in dscc_compute_dsc_parameters()
117 copy_pps_fields(&dsc_params->pps, &dsc_cfg); in dscc_compute_dsc_parameters()
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A Ddc_dsc.c84 struct dc_dsc_config *dsc_cfg);
737 struct dc_dsc_config *dsc_cfg) in setup_dsc_config() argument
753 memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); in setup_dsc_config()
775 dsc_cfg->ycbcr422_simple = false; in setup_dsc_config()
793 dsc_cfg->ycbcr422_simple = is_dsc_possible; in setup_dsc_config()
891 dsc_cfg->num_slices_h = num_slices_h; in setup_dsc_config()
915 dsc_cfg->num_slices_v = pic_height/slice_height; in setup_dsc_config()
925 dsc_cfg->bits_per_pixel = target_bpp; in setup_dsc_config()
936 dsc_cfg->is_dp = dsc_sink_caps->is_dp; in setup_dsc_config()
953 struct dc_dsc_config *dsc_cfg) in dc_dsc_compute_config() argument
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/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_dsc.c199 dsc_config_log(dsc, dsc_cfg); in dsc2_set_config()
218 dsc_config_log(dsc, dsc_cfg); in dsc2_get_packed_pps()
341 ASSERT(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2); in dsc_prepare_config()
342 ASSERT(dsc_cfg->pic_width); in dsc_prepare_config()
343 ASSERT(dsc_cfg->pic_height); in dsc_prepare_config()
351 if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || in dsc_prepare_config()
352 !(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2) || in dsc_prepare_config()
353 !dsc_cfg->pic_width || !dsc_cfg->pic_height || in dsc_prepare_config()
355 8 <= dsc_cfg->dc_dsc_cfg.linebuf_depth && dsc_cfg->dc_dsc_cfg.linebuf_depth <= 13) || in dsc_prepare_config()
381 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
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A Ddcn20_resource.c2056 pipes[pipe_cnt].dout.dsc_slices = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.num_slices_h; in dcn20_populate_dml_pipes_from_context()
2193 !res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.ycbcr422_simple) in dcn20_populate_dml_pipes_from_context()
2478 struct dsc_config dsc_cfg; in dcn20_validate_dsc() local
2489 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left in dcn20_validate_dsc()
2491 dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top in dcn20_validate_dsc()
2493 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in dcn20_validate_dsc()
2494 dsc_cfg.color_depth = stream->timing.display_color_depth; in dcn20_validate_dsc()
2495 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in dcn20_validate_dsc()
2496 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in dcn20_validate_dsc()
2497 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
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A Ddcn20_stream_encoder.c448 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_hwss.c548 struct dsc_config dsc_cfg; local
555 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding;
558 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg;
559 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0);
560 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt;
570 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt;
571 dsc_cfg.pic_width *= opp_cnt;
675 struct dsc_config dsc_cfg; local
678 memset(&dsc_cfg, 0, sizeof(dsc_cfg));
684 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding;
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A Ddc_stream.c109 memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg)); in dc_stream_construct()
110 stream->timing.dsc_cfg.num_slices_h = 0; in dc_stream_construct()
111 stream->timing.dsc_cfg.num_slices_v = 0; in dc_stream_construct()
112 stream->timing.dsc_cfg.bits_per_pixel = 128; in dc_stream_construct()
113 stream->timing.dsc_cfg.block_pred_enable = 1; in dc_stream_construct()
114 stream->timing.dsc_cfg.linebuf_depth = 9; in dc_stream_construct()
115 stream->timing.dsc_cfg.version_minor = 2; in dc_stream_construct()
116 stream->timing.dsc_cfg.ycbcr422_simple = 0; in dc_stream_construct()
A Ddc_link.c4783 timing->dsc_cfg.bits_per_pixel,
4784 timing->dsc_cfg.num_slices_h,
4785 timing->dsc_cfg.is_dp);
A Ddc.c2660 struct dc_dsc_config old_dsc_cfg = stream->timing.dsc_cfg; in copy_stream_update_to_stream()
2671 stream->timing.dsc_cfg = *update->dsc_config; in copy_stream_update_to_stream()
2674 stream->timing.dsc_cfg = old_dsc_cfg; in copy_stream_update_to_stream()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Ddsc.h97 …ol (*dsc_validate_stream)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);
98 void (*dsc_set_config)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
100 bool (*dsc_get_packed_pps)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_mst_types.c555 memset(&params[i].timing->dsc_cfg, 0, sizeof(params[i].timing->dsc_cfg)); in set_dsc_configs_from_fairness_vars()
563 &params[i].timing->dsc_cfg)) { in set_dsc_configs_from_fairness_vars()
567 params[i].timing->dsc_cfg.bits_per_pixel = params[i].bpp_overwrite; in set_dsc_configs_from_fairness_vars()
569 params[i].timing->dsc_cfg.bits_per_pixel = vars[i + k].bpp_x16; in set_dsc_configs_from_fairness_vars()
572 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; in set_dsc_configs_from_fairness_vars()
575 params[i].timing->dsc_cfg.num_slices_v = params[i].num_slices_v; in set_dsc_configs_from_fairness_vars()
A Damdgpu_dm.c6104 &stream->timing.dsc_cfg)) { in apply_dsc_policy_for_stream()
6115 stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in apply_dsc_policy_for_stream()
6118 stream->timing.dsc_cfg.num_slices_v = aconnector->dsc_settings.dsc_num_slices_v; in apply_dsc_policy_for_stream()
6121 stream->timing.dsc_cfg.bits_per_pixel = aconnector->dsc_settings.dsc_bits_per_pixel; in apply_dsc_policy_for_stream()
/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_dsc.h78 struct dc_dsc_config *dsc_cfg);
A Ddc_hw_types.h777 struct dc_dsc_config dsc_cfg; member
/linux/include/drm/
A Ddrm_dsc.h608 const struct drm_dsc_config *dsc_cfg);
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_dccg.c489 && !timing->dsc_cfg.ycbcr422_simple)) { in dccg31_set_dtbclk_dto()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_optc.c1612 && !timing->dsc_cfg.ycbcr422_simple); in optc1_is_two_pixels_per_containter()

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