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Searched refs:dwb_pipe_inst (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_hwseq.c227 ASSERT(wb_info->dwb_pipe_inst < MAX_DWB_PIPES); in dcn30_set_writeback()
236 wb_info->dwb_pipe_inst, wb_info->mpcc_inst); in dcn30_set_writeback()
248 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn30_update_writeback()
250 __func__, wb_info->dwb_pipe_inst,\ in dcn30_update_writeback()
326 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn30_enable_writeback()
332 __func__, wb_info->dwb_pipe_inst,\ in dcn30_enable_writeback()
349 unsigned int dwb_pipe_inst) in dcn30_disable_writeback() argument
354 ASSERT(dwb_pipe_inst < MAX_DWB_PIPES); in dcn30_disable_writeback()
355 dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dcn30_disable_writeback()
356 mcif_wb = dc->res_pool->mcif_wb[dwb_pipe_inst]; in dcn30_disable_writeback()
[all …]
A Ddcn30_hwseq.h48 unsigned int dwb_pipe_inst);
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_stream.c449 if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_add_writeback()
456 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
464 stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) { in dc_stream_add_writeback()
476 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
487 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
503 uint32_t dwb_pipe_inst) in dc_stream_remove_writeback() argument
511 if (dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_remove_writeback()
520 stream->writeback_info[i].dwb_pipe_inst == dwb_pipe_inst) { in dc_stream_remove_writeback()
545 dc->hwss.disable_writeback(dc, dwb_pipe_inst); in dc_stream_remove_writeback()
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_optc.c284 uint32_t dwb_pipe_inst) in optc2_set_dwb_source() argument
288 if (dwb_pipe_inst == 0) in optc2_set_dwb_source()
291 else if (dwb_pipe_inst == 1) in optc2_set_dwb_source()
A Ddcn20_hwseq.h110 unsigned int dwb_pipe_inst);
A Ddcn20_hwseq.c1915 ASSERT(wb_info->dwb_pipe_inst < MAX_DWB_PIPES); in dcn20_enable_writeback()
1917 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
1918 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
1922 optc->funcs->set_dwb_source(optc, wb_info->dwb_pipe_inst); in dcn20_enable_writeback()
1925 …config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst]); in dcn20_enable_writeback()
1935 unsigned int dwb_pipe_inst) in dcn20_disable_writeback() argument
1940 ASSERT(dwb_pipe_inst < MAX_DWB_PIPES); in dcn20_disable_writeback()
1941 dwb = dc->res_pool->dwbc[dwb_pipe_inst]; in dcn20_disable_writeback()
1942 mcif_wb = dc->res_pool->mcif_wb[dwb_pipe_inst]; in dcn20_disable_writeback()
/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_stream.h88 int dwb_pipe_inst; member
394 uint32_t dwb_pipe_inst);
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dtiming_generator.h260 uint32_t dwb_pipe_inst);
/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dhw_sequencer.h182 unsigned int dwb_pipe_inst);

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