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/linux/drivers/gpu/drm/i915/gem/selftests/
A Dmock_context.c31 INIT_LIST_HEAD(&ctx->stale.engines); in mock_context()
52 RCU_INIT_POINTER(ctx->engines, e); in mock_context()
113 struct i915_gem_engines *engines; in live_context_for_engine() local
118 engines = alloc_engines(1); in live_context_for_engine()
119 if (!engines) in live_context_for_engine()
124 __free_engines(engines, 0); in live_context_for_engine()
130 __free_engines(engines, 0); in live_context_for_engine()
135 engines->engines[0] = ce; in live_context_for_engine()
136 engines->num_engines = 1; in live_context_for_engine()
140 engines = rcu_replace_pointer(ctx->engines, engines, 1); in live_context_for_engine()
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/linux/drivers/gpu/drm/i915/gt/
A Dselftest_rc6.c163 struct intel_engine_cs *engine, **engines; in randomised_engines() local
173 engines = kmalloc_array(n, sizeof(*engines), GFP_KERNEL); in randomised_engines()
174 if (!engines) in randomised_engines()
179 engines[n++] = engine; in randomised_engines()
181 i915_prandom_shuffle(engines, sizeof(*engines), n, prng); in randomised_engines()
184 return engines; in randomised_engines()
190 struct intel_engine_cs **engines; in live_rc6_ctx_wa() local
199 engines = randomised_engines(gt, &prng, &count); in live_rc6_ctx_wa()
200 if (!engines) in live_rc6_ctx_wa()
204 struct intel_engine_cs *engine = engines[n]; in live_rc6_ctx_wa()
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A Dintel_engine_user.c79 struct list_head *engines) in sort_engines() argument
87 list_add((struct list_head *)&engine->uabi_node, engines); in sort_engines()
89 list_sort(NULL, engines, engine_cmp); in sort_engines()
196 LIST_HEAD(engines); in intel_engines_driver_register()
198 sort_engines(i915, &engines); in intel_engines_driver_register()
202 list_for_each_safe(it, next, &engines) { in intel_engines_driver_register()
A Dintel_engine.h291 intel_engine_create_parallel(struct intel_engine_cs **engines, in intel_engine_create_parallel() argument
295 GEM_BUG_ON(!engines[0]->cops->create_parallel); in intel_engine_create_parallel()
296 return engines[0]->cops->create_parallel(engines, num_engines, width); in intel_engine_create_parallel()
/linux/drivers/gpu/drm/i915/gem/
A Di915_gem_context.c731 set.engines = kmalloc_array(set.num_engines, sizeof(*set.engines), GFP_KERNEL); in set_proto_ctx_engines()
732 if (!set.engines) in set_proto_ctx_engines()
740 kfree(set.engines); in set_proto_ctx_engines()
744 memset(&set.engines[n], 0, sizeof(set.engines[n])); in set_proto_ctx_engines()
757 kfree(set.engines); in set_proto_ctx_engines()
772 kfree(set.engines); in set_proto_ctx_engines()
982 if (!e->engines[count]) in __free_engines()
1001 free_engines(engines); in free_engines_rcu()
1017 list_del(&engines->link); in engines_notify()
1171 e->engines[n] = ce; in user_engines()
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A Di915_gem_context.h186 return rcu_dereference_protected(ctx->engines, in i915_gem_context_engines()
211 struct i915_gem_engines *e = rcu_dereference(ctx->engines); in i915_gem_context_get_engine()
214 else if (likely(idx < e->num_engines && e->engines[idx])) in i915_gem_context_get_engine()
215 ce = intel_context_get(e->engines[idx]); in i915_gem_context_get_engine()
225 struct i915_gem_engines *engines) in i915_gem_engines_iter_init() argument
227 it->engines = engines; in i915_gem_engines_iter_init()
234 #define for_each_gem_engine(ce, engines, it) \ argument
235 for (i915_gem_engines_iter_init(&(it), (engines)); \
A Di915_gem_context_types.h55 struct intel_context *engines[]; member
66 const struct i915_gem_engines *engines; member
253 struct i915_gem_engines __rcu *engines; member
409 struct list_head engines; member
/linux/drivers/crypto/marvell/cesa/
A Dcesa.c377 struct mv_cesa_engine *engine = &cesa->engines[idx]; in mv_cesa_get_sram()
439 struct mv_cesa_engine *engines; in mv_cesa_probe() local
470 cesa->engines = devm_kcalloc(dev, caps->nengines, sizeof(*engines), in mv_cesa_probe()
472 if (!cesa->engines) in mv_cesa_probe()
490 struct mv_cesa_engine *engine = &cesa->engines[i]; in mv_cesa_probe()
574 clk_disable_unprepare(cesa->engines[i].zclk); in mv_cesa_probe()
575 clk_disable_unprepare(cesa->engines[i].clk); in mv_cesa_probe()
577 if (cesa->engines[i].irq > 0) in mv_cesa_probe()
592 clk_disable_unprepare(cesa->engines[i].zclk); in mv_cesa_remove()
593 clk_disable_unprepare(cesa->engines[i].clk); in mv_cesa_remove()
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/linux/Documentation/devicetree/bindings/fsi/
A Dfsi.txt5 engines within those slaves. However, we have a facility to match devicetree
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
16 represent the FSI slaves and their slave engines. As a basic outline:
41 adding subordinate device tree nodes as children of FSI engines.
79 Each slave provides an address-space, under which the engines are accessible.
91 FSI engines (devices)
116 additional engines, but they don't necessarily need to be describe in the
/linux/drivers/gpu/drm/i915/gt/uc/
A Dselftest_guc_multi_lrc.c12 static void logical_sort(struct intel_engine_cs **engines, int num_engines) in logical_sort() argument
19 if (engines[j]->logical_mask & BIT(i)) { in logical_sort()
20 sorted[i] = engines[j]; in logical_sort()
25 memcpy(*engines, *sorted, in logical_sort()
/linux/Documentation/netlabel/
A Dintroduction.rst15 is composed of three main components, the protocol engines, the communication
21 The protocol engines are responsible for both applying and retrieving the
25 refrain from calling the protocol engines directly, instead they should use
45 independent interface to the underlying NetLabel protocol engines. In addition
/linux/drivers/gpu/drm/omapdrm/
A Domap_dmm_tiler.c297 if (dmm->engines[i].async) in omap_dmm_irq_handler()
298 release_engine(&dmm->engines[i]); in omap_dmm_irq_handler()
300 complete(&dmm->engines[i].compl); in omap_dmm_irq_handler()
758 kfree(omap_dmm->engines); in omap_dmm_remove()
897 omap_dmm->engines = kcalloc(omap_dmm->num_engines, in omap_dmm_probe()
898 sizeof(*omap_dmm->engines), GFP_KERNEL); in omap_dmm_probe()
899 if (!omap_dmm->engines) { in omap_dmm_probe()
905 omap_dmm->engines[i].id = i; in omap_dmm_probe()
906 omap_dmm->engines[i].dmm = omap_dmm; in omap_dmm_probe()
907 omap_dmm->engines[i].refill_va = omap_dmm->refill_va + in omap_dmm_probe()
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/linux/Documentation/ABI/testing/
A Dsysfs-bus-hsi8 engines (APE) with cellular modem engines (CMT) in cellular
A Ddebugfs-driver-habanalabs18 registers of the TPC and MME engines. This is sometimes needed
26 8 - 11 MME engines
27 12 - 19 TPC engines
129 What: /sys/kernel/debug/habanalabs/hl<n>/engines
133 Description: Displays the status registers values of the device engines and
239 Description: Sets the stop-on_error option for the device engines. Value of
/linux/tools/include/uapi/drm/
A Di915_drm.h2057 struct i915_engine_class_instance engines[0]; member
2066 struct i915_engine_class_instance engines[N__]; \
2095 struct i915_engine_class_instance engines[0]; member
2105 struct i915_engine_class_instance engines[N__]; \
2222 struct i915_engine_class_instance engines[0]; member
2234 struct i915_engine_class_instance engines[N__]; \
2297 struct i915_engine_class_instance engines[0]; member
2302 struct i915_engine_class_instance engines[N__]; \
2945 struct drm_i915_engine_info engines[]; member
/linux/include/uapi/drm/
A Di915_drm.h2057 struct i915_engine_class_instance engines[0]; member
2066 struct i915_engine_class_instance engines[N__]; \
2095 struct i915_engine_class_instance engines[0]; member
2105 struct i915_engine_class_instance engines[N__]; \
2222 struct i915_engine_class_instance engines[0]; member
2234 struct i915_engine_class_instance engines[N__]; \
2297 struct i915_engine_class_instance engines[0]; member
2302 struct i915_engine_class_instance engines[N__]; \
2945 struct drm_i915_engine_info engines[]; member
/linux/drivers/gpu/drm/nouveau/nvif/
A Dfifo.c64 device->runlist[i].engines = a->v.runlist[i].data; in nvif_fifo_runlists()
82 if (device->runlist[i].engines & engine) in nvif_fifo_runlist()
/linux/drivers/dma/idxd/
A Ddevice.c668 engine = idxd->engines[i]; in idxd_engines_clear_state()
764 iowrite64(group->grpcfg.engines, idxd->reg_base + grpcfg_offset); in idxd_group_config_write()
939 int i, engines = 0; in idxd_engines_setup() local
945 group->grpcfg.engines = 0; in idxd_engines_setup()
949 eng = idxd->engines[i]; in idxd_engines_setup()
955 group->grpcfg.engines |= BIT(eng->id); in idxd_engines_setup()
956 engines++; in idxd_engines_setup()
959 if (!engines) in idxd_engines_setup()
1100 grpcfg_offset, group->grpcfg.engines); in idxd_group_load_config()
1107 if (group->grpcfg.engines & BIT(i)) { in idxd_group_load_config()
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A Dinit.c269 idxd->engines = kcalloc_node(idxd->max_engines, sizeof(struct idxd_engine *), in idxd_setup_engines()
271 if (!idxd->engines) in idxd_setup_engines()
295 idxd->engines[i] = engine; in idxd_setup_engines()
302 engine = idxd->engines[i]; in idxd_setup_engines()
369 put_device(engine_confdev(idxd->engines[i])); in idxd_cleanup_internals()
414 put_device(engine_confdev(idxd->engines[i])); in idxd_setup_internals()
/linux/Documentation/devicetree/bindings/net/
A Dralink,rt2880-net.txt17 - interrupts: Should contain the frame engines interrupt
18 - resets: Should contain the frame engines resets
/linux/Documentation/devicetree/bindings/powerpc/4xx/
A Dppc440spe-adma.txt5 for DMA engines and Memory Queue Module node. The latter is used
40 for both DMA engines>.
/linux/drivers/gpu/drm/i915/selftests/
A Di915_request.c2986 } *engines; in perf_parallel_engines() local
2989 engines = kcalloc(nengines, sizeof(*engines), GFP_KERNEL); in perf_parallel_engines()
2990 if (!engines) in perf_parallel_engines()
3011 memset(&engines[idx].p, 0, sizeof(engines[idx].p)); in perf_parallel_engines()
3012 engines[idx].p.engine = engine; in perf_parallel_engines()
3014 engines[idx].tsk = kthread_run(*fn, &engines[idx].p, in perf_parallel_engines()
3016 if (IS_ERR(engines[idx].tsk)) { in perf_parallel_engines()
3017 err = PTR_ERR(engines[idx].tsk); in perf_parallel_engines()
3021 get_task_struct(engines[idx++].tsk); in perf_parallel_engines()
3030 if (IS_ERR(engines[idx].tsk)) in perf_parallel_engines()
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/linux/drivers/gpu/drm/amd/display/dc/dce60/
A Ddce60_resource.c822 if (pool->base.engines[i] != NULL) in dce60_resource_destruct()
823 dce110_engine_destroy(&pool->base.engines[i]); in dce60_resource_destruct()
1073 pool->base.engines[i] = dce60_aux_engine_create(ctx, i); in dce60_construct()
1074 if (pool->base.engines[i] == NULL) { in dce60_construct()
1270 pool->base.engines[i] = dce60_aux_engine_create(ctx, i); in dce61_construct()
1271 if (pool->base.engines[i] == NULL) { in dce61_construct()
1463 pool->base.engines[i] = dce60_aux_engine_create(ctx, i); in dce64_construct()
1464 if (pool->base.engines[i] == NULL) { in dce64_construct()
/linux/drivers/gpu/drm/amd/display/dc/dce80/
A Ddce80_resource.c827 if (pool->base.engines[i] != NULL) in dce80_resource_destruct()
828 dce110_engine_destroy(&pool->base.engines[i]); in dce80_resource_destruct()
1084 pool->base.engines[i] = dce80_aux_engine_create(ctx, i); in dce80_construct()
1085 if (pool->base.engines[i] == NULL) { in dce80_construct()
1283 pool->base.engines[i] = dce80_aux_engine_create(ctx, i); in dce81_construct()
1284 if (pool->base.engines[i] == NULL) { in dce81_construct()
1478 pool->base.engines[i] = dce80_aux_engine_create(ctx, i); in dce83_construct()
1479 if (pool->base.engines[i] == NULL) { in dce83_construct()
/linux/Documentation/powerpc/
A Dvas-api.rst14 unit comprises of one or more hardware engines or co-processor types
62 access to all GZIP engines in the system. The only valid operations on
79 engines (typically, one per P9 chip) there is just one
130 "Discovery of available VAS engines" section below.
168 that the application can use to copy/paste its CRB to the hardware engines.
190 Discovery of available VAS engines

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