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Searched refs:evclk (Results 1 – 25 of 34) sorted by relevance

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/linux/drivers/gpu/drm/radeon/
A Dtrinity_dpm.c950 if ((old_rps->evclk != new_rps->evclk) || in trinity_set_vce_clock()
953 if (new_rps->evclk || new_rps->ecclk) in trinity_set_vce_clock()
957 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); in trinity_set_vce_clock()
1461 u32 evclk, u32 ecclk, u16 *voltage) in trinity_get_vce_clock_voltage() argument
1468 if (((evclk == 0) && (ecclk == 0)) || in trinity_get_vce_clock_voltage()
1475 if ((evclk <= table->entries[i].evclk) && in trinity_get_vce_clock_voltage()
1511 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in trinity_apply_state_adjust_rules()
1514 new_rps->evclk = 0; in trinity_apply_state_adjust_rules()
1532 trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage); in trinity_apply_state_adjust_rules()
A Dkv_dpm.c749 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); in kv_populate_vce_table()
753 (u8)kv_get_clk_bypass(rdev, table->entries[i].evclk); in kv_populate_vce_table()
756 table->entries[i].evclk, false, &dividers); in kv_populate_vce_table()
1280 static u8 kv_get_vce_boot_level(struct radeon_device *rdev, u32 evclk) in kv_get_vce_boot_level() argument
1287 if (table->entries[i].evclk >= evclk) in kv_get_vce_boot_level()
1303 if (radeon_new_state->evclk > 0 && radeon_current_state->evclk == 0) { in kv_update_vce_dpm()
1310 pi->vce_boot_level = kv_get_vce_boot_level(rdev, radeon_new_state->evclk); in kv_update_vce_dpm()
1327 } else if (radeon_new_state->evclk == 0 && radeon_current_state->evclk > 0) { in kv_update_vce_dpm()
1952 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()
1955 new_rps->evclk = 0; in kv_apply_state_adjust_rules()
[all …]
A Dradeon_asic.h697 int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
749 int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
787 int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
A Dsi_dpm.c2915 u32 evclk, u32 ecclk, u16 *voltage) in si_get_vce_clock_voltage() argument
2922 if (((evclk == 0) && (ecclk == 0)) || in si_get_vce_clock_voltage()
2929 if ((evclk <= table->entries[i].evclk) && in si_get_vce_clock_voltage()
2988 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()
2990 si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk, in si_apply_state_adjust_rules()
2993 rps->evclk = 0; in si_apply_state_adjust_rules()
5915 if ((old_rps->evclk != new_rps->evclk) || in si_set_vce_clock()
5918 if (new_rps->evclk || new_rps->ecclk) in si_set_vce_clock()
5922 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); in si_set_vce_clock()
A Dradeon.h1377 u32 evclk; member
1472 u32 evclk; member
1561 u32 evclk; member
1991 int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk);
A Dci_dpm.c781 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()
784 rps->evclk = 0; in ci_apply_state_adjust_rules()
2666 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].evclk; in ci_populate_smc_vce_level()
4070 if (table->entries[i].evclk >= min_evclk) in ci_get_vce_boot_level()
4085 if (radeon_current_state->evclk != radeon_new_state->evclk) { in ci_update_vce_dpm()
4086 if (radeon_new_state->evclk) { in ci_update_vce_dpm()
A Dr600_dpm.c1107 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = in r600_parse_extended_power_table()
1122 rdev->pm.dpm.vce_states[i].evclk = in r600_parse_extended_power_table()
/linux/drivers/gpu/drm/amd/pm/powerplay/
A Dkv_dpm.c990 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); in kv_populate_vce_table()
994 (u8)kv_get_clk_bypass(adev, table->entries[i].evclk); in kv_populate_vce_table()
997 table->entries[i].evclk, false, &dividers); in kv_populate_vce_table()
1529 static u8 kv_get_vce_boot_level(struct amdgpu_device *adev, u32 evclk) in kv_get_vce_boot_level() argument
1536 if (table->entries[i].evclk >= evclk) in kv_get_vce_boot_level()
1552 if (amdgpu_new_state->evclk > 0 && amdgpu_current_state->evclk == 0) { in kv_update_vce_dpm()
1572 } else if (amdgpu_new_state->evclk == 0 && amdgpu_current_state->evclk > 0) { in kv_update_vce_dpm()
2219 new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()
2222 new_rps->evclk = 0; in kv_apply_state_adjust_rules()
2287 new_rps->evclk || new_rps->ecclk; in kv_apply_state_adjust_rules()
[all …]
A Dsi_dpm.c3016 u32 evclk, u32 ecclk, u16 *voltage) in si_get_vce_clock_voltage() argument
3023 if (((evclk == 0) && (ecclk == 0)) || in si_get_vce_clock_voltage()
3030 if ((evclk <= table->entries[i].evclk) && in si_get_vce_clock_voltage()
3446 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()
3448 si_get_vce_clock_voltage(adev, rps->evclk, rps->ecclk, in si_apply_state_adjust_rules()
3451 rps->evclk = 0; in si_apply_state_adjust_rules()
6959 if ((old_rps->evclk != new_rps->evclk) || in si_set_vce_clock()
6962 if (new_rps->evclk || new_rps->ecclk) { in si_set_vce_clock()
7975 *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); in si_check_state_equal()
/linux/drivers/gpu/drm/amd/pm/inc/
A Dpower_state.h180 unsigned long evclk; member
A Damdgpu_dpm.h63 u32 evclk; member
174 u32 evclk; member
A Dhwmgr.h104 uint32_t evclk; member
158 uint32_t evclk; member
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dsmu10_hwmgr.h131 uint32_t evclk; member
A Dsmu8_hwmgr.h147 uint32_t evclk; member
A Dsmu7_hwmgr.h73 uint32_t evclk; member
A Dvega10_hwmgr.h101 uint32_t evclk; member
A Dvega20_hwmgr.h118 uint32_t evclk; member
A Dprocesspptables.c1252 vce_table->entries[i].evclk = ((unsigned long)entry->ucEVClkHigh << 16) in get_vce_clock_voltage_limit_table()
1688 …vce_state->evclk = ((uint32_t)vce_clock_info->ucEVClkHigh << 16) | le16_to_cpu(vce_clock_info->usE… in get_vce_state_table_entry()
/linux/drivers/gpu/drm/amd/amdgpu/
A Dsi.c1898 static int si_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in si_set_vce_clocks() argument
1912 if (!evclk || !ecclk) { in si_set_vce_clocks()
1919 r = si_calc_upll_dividers(adev, evclk, ecclk, 125000, 250000, in si_set_vce_clocks()
A Dnv.c564 static int nv_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in nv_set_vce_clocks() argument
A Damdgpu.h652 int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
A Dsoc15.c679 static int soc15_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in soc15_set_vce_clocks() argument
A Dcik.c1489 static int cik_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in cik_set_vce_clocks() argument
/linux/drivers/gpu/drm/amd/include/
A Dkgd_pp_interface.h31 u32 evclk; member
/linux/drivers/gpu/drm/amd/pm/
A Damdgpu_dpm.c519 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = in amdgpu_parse_extended_power_table()
535 adev->pm.dpm.vce_states[i].evclk = in amdgpu_parse_extended_power_table()

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