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Searched refs:flush_hw_mask (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/mdp5/
A Dmdp5_cfg.c36 .flush_hw_mask = 0x0003ffff,
125 .flush_hw_mask = 0x0003ffff,
220 .flush_hw_mask = 0x003fffff,
312 .flush_hw_mask = 0x4003ffff,
384 .flush_hw_mask = 0x4003ffff,
472 .flush_hw_mask = 0xf0ffffff,
557 .flush_hw_mask = 0xf4ffffff,
670 .flush_hw_mask = 0xffffffff,
765 .flush_hw_mask = 0xffffffff,
852 .flush_hw_mask = 0xffffffff,
[all …]
A Dmdp5_ctl.c63 u32 flush_hw_mask; member
478 (!(ctl_mgr->flush_hw_mask & bit) && (flush_mask & bit)) in fix_sw_flush()
553 flush_mask &= ctl_mgr->flush_hw_mask; in mdp5_ctl_commit()
718 ctl_mgr->flush_hw_mask = ctl_cfg->flush_hw_mask; in mdp5_ctlm_init()
A Dmdp5_cfg.h56 uint32_t flush_hw_mask; /* FLUSH register's hardware mask */ member

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