/linux/arch/ia64/include/asm/ |
A D | cacheflush.h | 21 extern void flush_icache_range(unsigned long start, unsigned long end); 22 #define flush_icache_range flush_icache_range macro 28 flush_icache_range(_addr, _addr + (len)); \
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/linux/arch/arc/kernel/ |
A D | kprobes.c | 41 flush_icache_range((unsigned long)p->addr, in arch_arm_kprobe() 49 flush_icache_range((unsigned long)p->addr, in arch_disarm_kprobe() 61 flush_icache_range((unsigned long)p->ainsn.t1_addr, in arch_remove_kprobe() 71 flush_icache_range((unsigned long)p->ainsn.t2_addr, in arch_remove_kprobe() 105 flush_icache_range((unsigned long)p->ainsn.t1_addr, in resume_execution() 115 flush_icache_range((unsigned long)p->ainsn.t2_addr, in resume_execution() 138 flush_icache_range((unsigned long)p->addr, in setup_singlestep() 178 flush_icache_range((unsigned long)p->ainsn.t1_addr, in setup_singlestep() 187 flush_icache_range((unsigned long)p->ainsn.t2_addr, in setup_singlestep()
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/linux/arch/hexagon/include/asm/ |
A D | cacheflush.h | 37 extern void flush_icache_range(unsigned long start, unsigned long end); 38 #define flush_icache_range flush_icache_range macro
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/linux/arch/arm64/include/asm/ |
A D | cacheflush.h | 82 static inline void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function 105 #define flush_icache_range flush_icache_range macro
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/linux/arch/xtensa/include/asm/ |
A D | cacheflush.h | 100 void flush_icache_range(unsigned long start, unsigned long end); 106 #define flush_icache_range local_flush_icache_range macro 142 #define flush_icache_range local_flush_icache_range macro 148 #define flush_icache_user_range flush_icache_range
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/linux/arch/nds32/include/asm/ |
A D | cacheflush.h | 11 void flush_icache_range(unsigned long start, unsigned long end); 12 #define flush_icache_range flush_icache_range macro
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/linux/include/asm-generic/ |
A D | cacheflush.h | 68 #ifndef flush_icache_range 69 static inline void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function 75 #define flush_icache_user_range flush_icache_range
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/linux/arch/powerpc/include/asm/ |
A D | cacheflush.h | 47 void flush_icache_range(unsigned long start, unsigned long stop); 48 #define flush_icache_range flush_icache_range macro
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/linux/arch/hexagon/mm/ |
A D | cache.c | 35 void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function 58 EXPORT_SYMBOL(flush_icache_range); 123 flush_icache_range((unsigned long) dst, in copy_to_user_page()
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/linux/arch/ia64/lib/ |
A D | flush.S | 26 GLOBAL_ENTRY(flush_icache_range) 64 END(flush_icache_range) 65 EXPORT_SYMBOL_GPL(flush_icache_range)
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/linux/arch/powerpc/mm/ |
A D | cacheflush.c | 58 void flush_icache_range(unsigned long start, unsigned long stop) in flush_icache_range() function 77 EXPORT_SYMBOL(flush_icache_range); 232 flush_icache_range((unsigned long)maddr, (unsigned long)maddr + len); in flush_icache_user_page()
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/linux/arch/alpha/include/asm/ |
A D | cacheflush.h | 20 #define flush_icache_range(start, end) imb() macro 22 #define flush_icache_range(start, end) smp_imb() macro
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/linux/arch/m68k/mm/ |
A D | cache.c | 91 void flush_icache_range(unsigned long address, unsigned long endaddr) in flush_icache_range() function 97 EXPORT_SYMBOL(flush_icache_range);
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/linux/arch/mips/kernel/ |
A D | ftrace.c | 83 flush_icache_range(ip, ip + 8); in ftrace_modify_code() 104 flush_icache_range(ip, ip + 8); in ftrace_modify_code_2() 124 flush_icache_range(ip, ip + 8); in ftrace_modify_code_2r()
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/linux/arch/arm/kernel/ |
A D | fiq.c | 101 flush_icache_range((unsigned long)base + offset, in set_fiq_handler() 103 flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length); in set_fiq_handler()
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/linux/arch/sh/include/asm/ |
A D | cacheflush.h | 46 extern void flush_icache_range(unsigned long start, unsigned long end); 47 #define flush_icache_user_range flush_icache_range
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/linux/arch/powerpc/kernel/ |
A D | kvm.c | 74 flush_icache_range((ulong)inst, (ulong)inst + 4); in kvm_patch_ins() 195 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsrd_len * 4); in kvm_patch_ins_mtmsrd() 255 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsr_len * 4); in kvm_patch_ins_mtmsr() 316 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_wrtee_len * 4); in kvm_patch_ins_wrtee() 350 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_wrteei_0_len * 4); in kvm_patch_ins_wrteei_0() 395 flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtsrin_len * 4); in kvm_patch_ins_mtsrin()
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/linux/arch/parisc/kernel/ |
A D | patch.c | 71 flush_icache_range(start, end); in __patch_text_multiple() 96 flush_icache_range(start, end); in __patch_text_multiple()
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/linux/arch/microblaze/kernel/ |
A D | ftrace.c | 57 flush_icache_range((u32)parent, (u32)parent + 4); in prepare_ftrace_return() 94 flush_icache_range(addr, addr + 4); in ftrace_modify_code()
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/linux/arch/mips/mm/ |
A D | c-tx39.c | 344 flush_icache_range = (void *) tx39h_flush_icache_all; in tx39_cache_init() 370 flush_icache_range = tx39_flush_icache_range; in tx39_cache_init() 389 __flush_icache_user_range = flush_icache_range; in tx39_cache_init()
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/linux/drivers/misc/lkdtm/ |
A D | perms.c | 55 flush_icache_range((unsigned long)dst, in execute_location() 121 flush_icache_range((unsigned long)ptr, (unsigned long)(ptr + size)); in lkdtm_WRITE_KERN()
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/linux/arch/ia64/kernel/ |
A D | ftrace.c | 122 flush_icache_range(ip, ip + MCOUNT_INSN_SIZE); in ftrace_modify_code() 194 flush_icache_range(addr, addr + 16); in ftrace_update_ftrace_func()
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/linux/arch/sh/kernel/ |
A D | kgdb.c | 122 flush_icache_range(addr, addr + instruction_size(op)); in get_step_address() 150 flush_icache_range((long)addr, (long)addr + in do_single_step() 161 flush_icache_range(stepped_address, stepped_address + 2); in undo_single_step()
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/linux/arch/nds32/mm/ |
A D | cacheflush.c | 16 void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function 26 EXPORT_SYMBOL(flush_icache_range); 44 flush_icache_range(kaddr, kaddr + len); in flush_icache_user_page()
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/linux/arch/mips/mti-malta/ |
A D | malta-init.c | 98 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); in mips_nmi_setup() 110 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); in mips_ejtag_setup()
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