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Searched refs:gart (Results 1 – 25 of 44) sorted by relevance

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/linux/drivers/iommu/
A Dtegra-gart.c58 #define FLUSH_GART_REGS(gart) readl_relaxed((gart)->regs + GART_CONFIG) argument
91 FLUSH_GART_REGS(gart); in do_gart_setup()
114 if (gart->active_domain && gart->active_domain != domain) { in gart_iommu_attach_dev()
307 FLUSH_GART_REGS(gart); in tegra_gart_suspend()
317 do_gart_setup(gart, gart->savedata); in tegra_gart_resume()
337 gart = kzalloc(sizeof(*gart), GFP_KERNEL); in tegra_gart_probe()
338 if (!gart) in tegra_gart_probe()
341 gart_handle = gart; in tegra_gart_probe()
343 gart->dev = dev; in tegra_gart_probe()
367 return gart; in tegra_gart_probe()
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A DMakefile23 obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
/linux/drivers/gpu/drm/radeon/
A Dradeon_gart.c87 rdev->gart.ptr = ptr; in radeon_gart_table_ram_alloc()
113 (void *)rdev->gart.ptr, rdev->gart.table_addr); in radeon_gart_table_ram_free()
114 rdev->gart.ptr = NULL; in radeon_gart_table_ram_free()
167 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr); in radeon_gart_table_vram_pin()
208 rdev->gart.ptr = NULL; in radeon_gart_table_vram_unpin()
267 if (rdev->gart.ptr) { in radeon_gart_unbind()
310 if (rdev->gart.ptr) { in radeon_gart_bind()
316 if (rdev->gart.ptr) { in radeon_gart_bind()
335 if (rdev->gart.pages) { in radeon_gart_init()
350 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); in radeon_gart_init()
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A Drs400.c84 if (rdev->gart.ptr) { in rs400_gart_init()
106 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rs400_gart_init()
164 tmp = (u32)rdev->gart.table_addr & 0xfffff000; in rs400_gart_enable()
165 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4; in rs400_gart_enable()
192 (unsigned long long)rdev->gart.table_addr); in rs400_gart_enable()
193 rdev->gart.ready = true; in rs400_gart_enable()
236 u32 *gtt = rdev->gart.ptr; in rs400_gart_set_page()
A Dradeon_asic.c209 .gart = {
277 .gart = {
373 .gart = {
441 .gart = {
509 .gart = {
577 .gart = {
645 .gart = {
713 .gart = {
781 .gart = {
849 .gart = {
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A Dr300.c122 void __iomem *ptr = rdev->gart.ptr; in rv370_pcie_gart_set_page()
134 if (rdev->gart.robj) { in rv370_pcie_gart_init()
144 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rv370_pcie_gart_init()
145 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; in rv370_pcie_gart_init()
146 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; in rv370_pcie_gart_init()
147 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; in rv370_pcie_gart_init()
157 if (rdev->gart.robj == NULL) { in rv370_pcie_gart_enable()
172 table_addr = rdev->gart.table_addr; in rv370_pcie_gart_enable()
187 rdev->gart.ready = true; in rv370_pcie_gart_enable()
A Drs600.c549 if (rdev->gart.robj) { in rs600_gart_init()
558 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; in rs600_gart_init()
567 if (rdev->gart.robj == NULL) { in rs600_gart_enable()
604 rdev->gart.table_addr); in rs600_gart_enable()
621 (unsigned long long)rdev->gart.table_addr); in rs600_gart_enable()
622 rdev->gart.ready = true; in rs600_gart_enable()
662 void __iomem *ptr = (void *)rdev->gart.ptr; in rs600_gart_set_page()
A Dradeon_ttm.c905 if (p >= rdev->gart.num_cpu_pages) in radeon_ttm_gtt_read()
908 page = rdev->gart.pages[p]; in radeon_ttm_gtt_read()
914 kunmap(rdev->gart.pages[p]); in radeon_ttm_gtt_read()
A Drv770.c909 if (rdev->gart.robj == NULL) { in rv770_pcie_gart_enable()
938 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in rv770_pcie_gart_enable()
949 (unsigned long long)rdev->gart.table_addr); in rv770_pcie_gart_enable()
950 rdev->gart.ready = true; in rv770_pcie_gart_enable()
A Dr100.c654 if (rdev->gart.ptr) { in r100_pci_gart_init()
662 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in r100_pci_gart_init()
663 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; in r100_pci_gart_init()
664 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; in r100_pci_gart_init()
665 rdev->asic->gart.set_page = &r100_pci_gart_set_page; in r100_pci_gart_init()
680 WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr); in r100_pci_gart_enable()
686 (unsigned long long)rdev->gart.table_addr); in r100_pci_gart_enable()
687 rdev->gart.ready = true; in r100_pci_gart_enable()
710 u32 *gtt = rdev->gart.ptr; in r100_pci_gart_set_page()
A Dni.c1265 if (rdev->gart.robj == NULL) { in cayman_pcie_gart_enable()
1294 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in cayman_pcie_gart_enable()
1340 (unsigned long long)rdev->gart.table_addr); in cayman_pcie_gart_enable()
1341 rdev->gart.ready = true; in cayman_pcie_gart_enable()
/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_gart.c119 if (adev->gart.bo == NULL) { in amdgpu_gart_table_vram_alloc()
162 r = amdgpu_bo_kmap(adev->gart.bo, &adev->gart.ptr); in amdgpu_gart_table_vram_pin()
189 adev->gart.ptr = NULL; in amdgpu_gart_table_vram_unpin()
208 adev->gart.ptr = NULL; in amdgpu_gart_table_vram_free()
236 if (!adev->gart.ready) { in amdgpu_gart_unbind()
248 if (!adev->gart.ptr) in amdgpu_gart_unbind()
287 if (!adev->gart.ready) { in amdgpu_gart_map()
325 if (!adev->gart.ready) { in amdgpu_gart_bind()
330 if (!adev->gart.ptr) in amdgpu_gart_bind()
334 adev->gart.ptr); in amdgpu_gart_bind()
[all …]
A Dgmc_v6_0.c475 if (adev->gart.bo == NULL) { in gmc_v6_0_gart_enable()
483 table_addr = amdgpu_bo_gpu_offset(adev->gart.bo); in gmc_v6_0_gart_enable()
561 adev->gart.ready = true; in gmc_v6_0_gart_enable()
569 if (adev->gart.bo) { in gmc_v6_0_gart_init()
576 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v6_0_gart_init()
577 adev->gart.gart_pte_flags = 0; in gmc_v6_0_gart_init()
A Dgmc_v10_0.c374 job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo); in gmc_v10_0_flush_gpu_tlb()
817 if (adev->gart.bo) { in gmc_v10_0_gart_init()
827 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v10_0_gart_init()
828 adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_NV10(MTYPE_UC) | in gmc_v10_0_gart_init()
990 if (adev->gart.bo == NULL) { in gmc_v10_0_gart_enable()
1022 (unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo)); in gmc_v10_0_gart_enable()
1024 adev->gart.ready = true; in gmc_v10_0_gart_enable()
A Dgmc_v7_0.c619 if (adev->gart.bo == NULL) { in gmc_v7_0_gart_enable()
627 table_addr = amdgpu_bo_gpu_offset(adev->gart.bo); in gmc_v7_0_gart_enable()
715 adev->gart.ready = true; in gmc_v7_0_gart_enable()
723 if (adev->gart.bo) { in gmc_v7_0_gart_init()
731 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v7_0_gart_init()
732 adev->gart.gart_pte_flags = 0; in gmc_v7_0_gart_init()
A Dgmc_v9_0.c1429 if (adev->gart.bo) { in gmc_v9_0_gart_init()
1446 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v9_0_gart_init()
1447 adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE_VG10(MTYPE_UC) | in gmc_v9_0_gart_init()
1712 if (adev->gart.bo == NULL) { in gmc_v9_0_gart_enable()
1735 (unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo)); in gmc_v9_0_gart_enable()
1737 adev->gart.ready = true; in gmc_v9_0_gart_enable()
A Dgmc_v8_0.c836 if (adev->gart.bo == NULL) { in gmc_v8_0_gart_enable()
844 table_addr = amdgpu_bo_gpu_offset(adev->gart.bo); in gmc_v8_0_gart_enable()
949 adev->gart.ready = true; in gmc_v8_0_gart_enable()
957 if (adev->gart.bo) { in gmc_v8_0_gart_init()
965 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v8_0_gart_init()
966 adev->gart.gart_pte_flags = AMDGPU_PTE_EXECUTABLE; in gmc_v8_0_gart_init()
A Damdgpu_gmc.c737 uint64_t flags = adev->gart.gart_pte_flags; //TODO it is UC. explore NC/RW? in amdgpu_gmc_init_pdb0()
745 u64 gart_ptb_gpu_pa = amdgpu_gmc_vram_pa(adev, adev->gart.bo); in amdgpu_gmc_init_pdb0()
/linux/include/soc/tegra/
A Dmc.h118 int tegra_gart_suspend(struct gart_device *gart);
119 int tegra_gart_resume(struct gart_device *gart);
127 static inline int tegra_gart_suspend(struct gart_device *gart) in tegra_gart_suspend() argument
132 static inline int tegra_gart_resume(struct gart_device *gart) in tegra_gart_resume() argument
213 struct gart_device *gart; member
/linux/Documentation/devicetree/bindings/memory-controllers/
A Dnvidia,tegra20-mc.yaml27 const: nvidia,tegra20-mc-gart
68 compatible = "nvidia,tegra20-mc-gart";
/linux/drivers/memory/tegra/
A Dtegra20.c694 if (IS_ENABLED(CONFIG_TEGRA_IOMMU_GART) && mc->gart) { in tegra20_mc_suspend()
695 err = tegra_gart_suspend(mc->gart); in tegra20_mc_suspend()
707 if (IS_ENABLED(CONFIG_TEGRA_IOMMU_GART) && mc->gart) { in tegra20_mc_resume()
708 err = tegra_gart_resume(mc->gart); in tegra20_mc_resume()
A Dmc.c796 mc->gart = tegra_gart_probe(&pdev->dev, mc); in tegra_mc_probe()
797 if (IS_ERR(mc->gart)) { in tegra_mc_probe()
799 PTR_ERR(mc->gart)); in tegra_mc_probe()
800 mc->gart = NULL; in tegra_mc_probe()
/linux/drivers/gpu/drm/nouveau/
A Dnouveau_chan.h24 struct nvif_object gart; member
A Dnouveau_chan.c97 nvif_object_dtor(&chan->gart); in nouveau_channel_del()
381 nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) in nouveau_channel_init() argument
444 ret = nvif_object_ctor(&chan->user, "abi16ChanGartCtxDma", gart, in nouveau_channel_init()
446 &chan->gart); in nouveau_channel_init()
/linux/drivers/gpu/drm/amd/amdkfd/
A Dkfd_migrate.c74 dst_addr = amdgpu_bo_gpu_offset(adev->gart.bo); in svm_migrate_gart_map()
85 pte_flags |= adev->gart.gart_pte_flags; in svm_migrate_gart_map()

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