Home
last modified time | relevance | path

Searched refs:gates (Results 1 – 25 of 50) sorted by relevance

12

/linux/Documentation/devicetree/bindings/clock/
A Dallwinner,sun4i-a10-gates-clk.yaml24 - const: allwinner,sun4i-a10-gates-clk
25 - const: allwinner,sun4i-a10-axi-gates-clk
26 - const: allwinner,sun4i-a10-ahb-gates-clk
27 - const: allwinner,sun5i-a10s-ahb-gates-clk
28 - const: allwinner,sun5i-a13-ahb-gates-clk
29 - const: allwinner,sun7i-a20-ahb-gates-clk
30 - const: allwinner,sun6i-a31-ahb1-gates-clk
31 - const: allwinner,sun8i-a23-ahb1-gates-clk
32 - const: allwinner,sun9i-a80-ahb0-gates-clk
33 - const: allwinner,sun9i-a80-ahb1-gates-clk
[all …]
A Dallwinner,sun8i-h3-bus-gates-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun8i-h3-bus-gates-clk.yaml#
23 const: allwinner,sun8i-h3-bus-gates-clk
59 compatible = "allwinner,sun8i-h3-bus-gates-clk";
A Drenesas,cpg-mstp-clocks.yaml13 The Clock Pulse Generator (CPG) can gate SoC device clocks. The gates are
14 organized in groups of up to 32 gates.
A Dst,nomadik.txt7 PLLs and clock gates.
34 HCLK nodes: these represent the clock gates on individual
A Dalphascale,acc.txt4 clock source, setting deviders and clock gates.
A Dingenic,cgu.yaml11 typically includes a variety of PLLs, multiplexers, dividers & gates in order
/linux/drivers/clk/mvebu/
A Dcommon.c193 struct clk **gates; member
211 to_clk_gate(__clk_get_hw(ctrl->gates[n])); in clk_gating_get_src()
213 return ctrl->gates[n]; in clk_gating_get_src()
271 ctrl->gates = kcalloc(ctrl->num_gates, sizeof(*ctrl->gates), in mvebu_clk_gating_setup()
273 if (WARN_ON(!ctrl->gates)) in mvebu_clk_gating_setup()
279 ctrl->gates[n] = clk_register_gate(NULL, desc[n].name, parent, in mvebu_clk_gating_setup()
282 WARN_ON(IS_ERR(ctrl->gates[n])); in mvebu_clk_gating_setup()
/linux/drivers/clk/sunxi/
A DMakefile16 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-simple-gates.o
20 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun8i-bus-gates.o
30 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-apb0-gates.o
34 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN8I) += clk-sun6i-apb0-gates.o
A Dbuilt-in.a12 clk-simple-gates.o/
16 clk-sun8i-bus-gates.o/
24 clk-sun6i-apb0-gates.o/
A D.built-in.a.cmd1 …gates.o drivers/clk/sunxi/clk-sun4i-display.o drivers/clk/sunxi/clk-sun4i-pll3.o drivers/clk/sunxi…
A D.clk-simple-gates.o.cmd1 …gates.o := /usr/bin/ccache /home/test/workspace/code/optee_3.16/build/../toolchains/aarch64/bin/aa…
3 source_drivers/clk/sunxi/clk-simple-gates.o := drivers/clk/sunxi/clk-simple-gates.c
5 deps_drivers/clk/sunxi/clk-simple-gates.o := \
814 drivers/clk/sunxi/clk-simple-gates.o: $(deps_drivers/clk/sunxi/clk-simple-gates.o)
816 $(deps_drivers/clk/sunxi/clk-simple-gates.o):
A D.clk-sun8i-bus-gates.o.cmd1 …gates.o := /usr/bin/ccache /home/test/workspace/code/optee_3.16/build/../toolchains/aarch64/bin/aa…
3 source_drivers/clk/sunxi/clk-sun8i-bus-gates.o := drivers/clk/sunxi/clk-sun8i-bus-gates.c
5 deps_drivers/clk/sunxi/clk-sun8i-bus-gates.o := \
811 drivers/clk/sunxi/clk-sun8i-bus-gates.o: $(deps_drivers/clk/sunxi/clk-sun8i-bus-gates.o)
813 $(deps_drivers/clk/sunxi/clk-sun8i-bus-gates.o):
A D.clk-sun6i-apb0-gates.o.cmd1 …gates.o := /usr/bin/ccache /home/test/workspace/code/optee_3.16/build/../toolchains/aarch64/bin/aa…
3 source_drivers/clk/sunxi/clk-sun6i-apb0-gates.o := drivers/clk/sunxi/clk-sun6i-apb0-gates.c
5 deps_drivers/clk/sunxi/clk-sun6i-apb0-gates.o := \
946 drivers/clk/sunxi/clk-sun6i-apb0-gates.o: $(deps_drivers/clk/sunxi/clk-sun6i-apb0-gates.o)
948 $(deps_drivers/clk/sunxi/clk-sun6i-apb0-gates.o):
/linux/net/nfc/nci/
A Dhci.c694 const struct nci_hci_gate *gates) in nci_hci_dev_connect_gates() argument
699 r = nci_hci_connect_gate(ndev, gates->dest_host, in nci_hci_dev_connect_gates()
700 gates->gate, gates->pipe); in nci_hci_dev_connect_gates()
703 gates++; in nci_hci_dev_connect_gates()
727 if (ndev->hci_dev->init_data.gates[0].gate != NCI_HCI_ADMIN_GATE) in nci_hci_dev_session_init()
731 ndev->hci_dev->init_data.gates[0].dest_host, in nci_hci_dev_session_init()
732 ndev->hci_dev->init_data.gates[0].gate, in nci_hci_dev_session_init()
733 ndev->hci_dev->init_data.gates[0].pipe); in nci_hci_dev_session_init()
755 ndev->hci_dev->init_data.gates); in nci_hci_dev_session_init()
/linux/drivers/clk/
A Dclk-oxnas.c30 struct clk_oxnas_gate **gates; member
192 .gates = ox810se_gates,
198 .gates = ox820_gates,
229 data->gates[i]->regmap = regmap; in oxnas_stdclk_probe()
A Dbuilt-in.a273 sunxi/clk-simple-gates.o/
277 sunxi/clk-sun8i-bus-gates.o/
285 sunxi/clk-sun6i-apb0-gates.o/
/linux/Documentation/devicetree/bindings/i2c/
A Di2c-gate.yaml16 there are no competing masters to consider for gates and therefore there is
17 no arbitration happening for gates.
/linux/Documentation/devicetree/bindings/mfd/
A Dallwinner,sun8i-a23-prcm.yaml31 - allwinner,sun8i-a23-apb0-gates-clk
73 const: allwinner,sun8i-a23-apb0-gates-clk
182 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
A Dallwinner,sun6i-a31-prcm.yaml31 - allwinner,sun6i-a31-apb0-gates-clk
71 const: allwinner,sun6i-a31-apb0-gates-clk
197 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
/linux/net/nfc/hci/
A Dcore.c450 const struct nfc_hci_gate *gates) in hci_dev_connect_gates() argument
455 gates->gate, gates->pipe); in hci_dev_connect_gates()
458 gates++; in hci_dev_connect_gates()
469 if (hdev->init_data.gates[0].gate != NFC_HCI_ADMIN_GATE) in hci_dev_session_init()
473 hdev->init_data.gates[0].gate, in hci_dev_session_init()
474 hdev->init_data.gates[0].pipe); in hci_dev_session_init()
499 hdev->init_data.gates); in hci_dev_session_init()
/linux/Documentation/driver-api/nfc/
A Dnfc-hci.rst38 support proprietary gates. This is the reason why the driver will pass a list
39 of proprietary gates that must be part of the session. HCI will ensure all
40 those gates have pipes connected when the hci device is set up.
41 In case the chip supports pre-opened gates and pseudo-static pipes, the driver
49 implementation, pipes are totally hidden. The public API only knows gates.
50 This is consistent with the driver need to send commands to proprietary gates
96 mode. This must be implemented only if the hardware uses proprietary gates or a
/linux/drivers/net/ethernet/stmicro/stmmac/
A Dstmmac_tc.c872 u32 gates = qopt->entries[i].gate_mask; in tc_setup_taprio() local
876 if (gates > GENMASK(31 - wid, 0)) in tc_setup_taprio()
885 gates |= BIT(0); in tc_setup_taprio()
889 gates &= ~BIT(0); in tc_setup_taprio()
896 priv->plat->est->gcl[i] = delta_ns | (gates << wid); in tc_setup_taprio()
/linux/security/safesetid/
A DKconfig8 SafeSetID is an LSM module that gates the setid family of syscalls to
/linux/drivers/platform/x86/intel/int3472/
A DKconfig19 set of discrete GPIOs and power gates.
/linux/Documentation/driver-api/fpga/
A Dintro.rst38 actual hard hardware that gates a bus to a CPU or a soft ("freeze")

Completed in 37 milliseconds

12