| /linux/drivers/net/ethernet/microchip/sparx5/ |
| A D | sparx5_main.h | 322 int gbase, int ginst, in spx5_offset() argument
330 return gbase + ((ginst) * gwidth) + in spx5_offset()
339 int gbase, int ginst, in spx5_addr() argument
348 gbase + ((ginst) * gwidth) + in spx5_addr()
353 int gbase, int ginst, in spx5_inst_addr() argument
361 gbase + ((ginst) * gwidth) + in spx5_inst_addr()
366 int gbase, int ginst, int gcnt, int gwidth, in spx5_rd() argument
387 gbase, ginst, gcnt, gwidth, in spx5_wr()
393 int gbase, int ginst, int gcnt, int gwidth, in spx5_inst_wr() argument
397 gbase, ginst, gcnt, gwidth, in spx5_inst_wr()
[all …]
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| /linux/drivers/phy/microchip/ |
| A D | sparx5_serdes.h | 53 int gbase, int ginst, in sdx5_addr() argument
62 gbase + ((ginst) * gwidth) + in sdx5_addr()
67 int gbase, int ginst, in sdx5_inst_baseaddr() argument
75 gbase + ((ginst) * gwidth) + in sdx5_inst_baseaddr()
81 int gbase, int ginst, int gcnt, int gwidth, in sdx5_rmw() argument
87 gbase, ginst, gcnt, gwidth, in sdx5_rmw()
96 int gbase, int ginst, int gcnt, int gwidth, in sdx5_inst_rmw() argument
102 gbase, ginst, gcnt, gwidth, in sdx5_inst_rmw()
126 int gbase, in sdx5_inst_addr() argument
131 return sdx5_inst_baseaddr(iomem, gbase, ginst, gcnt, gwidth, in sdx5_inst_addr()
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| /linux/drivers/clk/berlin/ |
| A D | bg2.c | 87 static void __iomem *gbase; variable
508 gbase = of_iomap(parent_np, 0); in berlin2_clock_setup()
509 if (!gbase) in berlin2_clock_setup()
576 0, gbase + REG_CLKSWITCH0, 0, 1, 0, &lock); in berlin2_clock_setup()
584 0, gbase + REG_CLKSWITCH0, 1, 1, 0, &lock); in berlin2_clock_setup()
592 0, gbase + REG_CLKSWITCH0, 2, 1, 0, &lock); in berlin2_clock_setup()
608 0, gbase + REG_CLKSELECT3, 4, 1, 0, &lock); in berlin2_clock_setup()
615 0, gbase + REG_CLKSELECT3, 6, 1, 0, &lock); in berlin2_clock_setup()
622 0, gbase + REG_CLKSELECT3, 7, 1, 0, &lock); in berlin2_clock_setup()
629 0, gbase + REG_CLKSELECT3, 9, 1, 0, &lock); in berlin2_clock_setup()
[all …]
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| A D | bg2q.c | 41 static void __iomem *gbase; variable
294 gbase = of_iomap(parent_np, 0); in berlin2q_clock_setup()
295 if (!gbase) { in berlin2q_clock_setup()
304 iounmap(gbase); in berlin2q_clock_setup()
316 ret = berlin2_pll_register(&bg2q_pll_map, gbase + REG_SYSPLLCTL0, in berlin2q_clock_setup()
341 hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase, in berlin2q_clock_setup()
351 gd->parent_name, gd->flags, gbase + REG_CLKENABLE, in berlin2q_clock_setup()
379 iounmap(gbase); in berlin2q_clock_setup()
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| /linux/arch/arm64/boot/dts/freescale/ |
| A D | fsl-ls2088a-rdb.dts | 28 phy-connection-type = "10gbase-r";
33 phy-connection-type = "10gbase-r";
38 phy-connection-type = "10gbase-r";
43 phy-connection-type = "10gbase-r";
48 phy-connection-type = "10gbase-r";
53 phy-connection-type = "10gbase-r";
58 phy-connection-type = "10gbase-r";
63 phy-connection-type = "10gbase-r";
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| A D | fsl-ls1088a-ten64.dts | 96 phy-connection-type = "10gbase-r";
104 phy-connection-type = "10gbase-r";
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| A D | fsl-ls1088a-rdb.dts | 22 phy-connection-type = "10gbase-r";
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| /linux/arch/arm64/boot/dts/microchip/ |
| A D | sparx5_pcb134_board.dtsi | 720 phy-mode = "10gbase-r";
730 phy-mode = "10gbase-r";
739 phy-mode = "10gbase-r";
748 phy-mode = "10gbase-r";
757 phy-mode = "10gbase-r";
766 phy-mode = "10gbase-r";
775 phy-mode = "10gbase-r";
784 phy-mode = "10gbase-r";
793 phy-mode = "10gbase-r";
802 phy-mode = "10gbase-r";
[all …]
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| A D | sparx5_pcb135_board.dtsi | 715 phy-mode = "10gbase-r";
723 phy-mode = "10gbase-r";
731 phy-mode = "10gbase-r";
739 phy-mode = "10gbase-r";
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| /linux/arch/arm64/boot/dts/marvell/ |
| A D | armada-8040-mcbin.dts | 37 phy-mode = "10gbase-r";
44 phy-mode = "10gbase-r";
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| A D | armada-8040-mcbin-singleshot.dts | 34 phy-mode = "10gbase-r";
41 phy-mode = "10gbase-r";
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| A D | armada-8040-db.dts | 198 phy-mode = "10gbase-r";
351 phy-mode = "10gbase-r";
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| A D | armada-8040-puzzle-m801.dts | 383 phy-mode = "10gbase-r";
457 phy-mode = "10gbase-r";
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| A D | cn9131-db.dtsi | 88 phy-mode = "10gbase-r";
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| A D | cn9130-crb.dtsi | 205 phy-mode = "10gbase-r";
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| A D | cn9132-db.dtsi | 106 phy-mode = "10gbase-r";
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| A D | armada-7040-db.dts | 285 phy-mode = "10gbase-r";
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| A D | armada-7040-mochabin.dts | 385 phy-mode = "10gbase-r";
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| A D | cn9130-db.dtsi | 129 phy-mode = "10gbase-r";
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| A D | armada-8040-clearfog-gt-8k.dts | 406 phy-mode = "10gbase-r";
|
| /linux/Documentation/devicetree/bindings/net/ |
| A D | microchip,sparx5-switch.yaml | 181 phy-mode = "10gbase-r";
190 phy-mode = "10gbase-r";
199 phy-mode = "10gbase-r";
208 phy-mode = "10gbase-r";
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| A D | ethernet-controller.yaml | 93 - 5gbase-r
98 - 10gbase-kr
100 - 10gbase-r
101 - 25gbase-r
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| A D | sff,sfp.txt | 84 phy-mode = "10gbase-kr";
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| /linux/drivers/mfd/ |
| A D | lpc_ich.c | 90 int gbase; /* GPIO base */ member
968 pci_read_config_dword(dev, priv->gbase, &base_addr_cfg); in lpc_ich_init_gpio()
1182 priv->gbase = GPIOBASE_ICH0; in lpc_ich_probe()
1185 priv->gbase = GPIOBASE_ICH6; in lpc_ich_probe()
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| /linux/Documentation/ABI/testing/ |
| A D | sysfs-class-net-phydev | 44 xaui, 10gbase-kr, unknown
|