| /linux/drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_packet_manager_v9.c | 44 packet->bitfields14.gds_size = qpd->gds_size & 0x3F; in pm_map_process_v9()
45 packet->bitfields14.gds_size_hi = (qpd->gds_size >> 6) & 0xF; in pm_map_process_v9()
89 packet->bitfields14.gds_size = qpd->gds_size & 0x3F; in pm_map_process_aldebaran()
90 packet->bitfields14.gds_size_hi = (qpd->gds_size >> 6) & 0xF; in pm_map_process_aldebaran()
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| A D | kfd_pm4_headers.h | 87 uint32_t gds_size:6; member
140 uint32_t gds_size:6; member
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| A D | kfd_pm4_headers_aldebaran.h | 77 uint32_t gds_size:6; member
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| A D | kfd_packet_manager_vi.c | 56 packet->bitfields10.gds_size = qpd->gds_size; in pm_map_process_vi()
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| A D | kfd_pm4_headers_vi.h | 190 uint32_t gds_size:6; member
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| A D | kfd_pm4_headers_ai.h | 183 uint32_t gds_size:6; member
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| A D | kfd_priv.h | 616 uint32_t gds_size; member
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | mes_api_def.h | 161 uint32_t gds_size; member
200 uint32_t gds_size; member
372 uint32_t gds_size; member
400 uint32_t gds_size; member
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| A D | amdgpu_gds.h | 31 uint32_t gds_size; member
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| A D | amdgpu_ids.h | 55 uint32_t gds_size; member
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| A D | amdgpu_job.h | 58 uint32_t gds_base, gds_size; member
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| A D | amdgpu_vm.c | 1143 id->gds_size != job->gds_size || in amdgpu_vm_need_pipeline_sync()
1176 id->gds_size != job->gds_size || in amdgpu_vm_flush()
1252 id->gds_size = job->gds_size; in amdgpu_vm_flush()
1258 job->gds_size, job->gws_base, in amdgpu_vm_flush()
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| A D | mes_v10_1.c | 237 mes_set_hw_res_pkt.gds_size = adev->gds.gds_size; in mes_v10_1_set_hw_resources()
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| A D | amdgpu_ring.h | 174 uint32_t gds_base, uint32_t gds_size,
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| A D | amdgpu_ids.c | 534 id->gds_size = 0; in amdgpu_vmid_reset()
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| A D | gfx_v9_0.c | 4284 uint32_t gds_base, uint32_t gds_size, in gfx_v9_0_ring_emit_gds_switch() argument
4298 gds_size); in gfx_v9_0_ring_emit_gds_switch()
4564 WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
4576 adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
4798 (adev->gds.gds_size)) { in gfx_v9_0_ecc_late_init()
7094 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
7099 adev->gds.gds_size = 0x1000; in gfx_v9_0_set_gds_init()
7105 adev->gds.gds_size = 0; in gfx_v9_0_set_gds_init()
7108 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
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| A D | amdgpu_kms.c | 693 gds_info.compute_partition_size = adev->gds.gds_size; in amdgpu_info_ioctl()
694 gds_info.gds_total_size = adev->gds.gds_size; in amdgpu_info_ioctl()
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| A D | gfx_v7_0.c | 4109 uint32_t gds_base, uint32_t gds_size, in gfx_v7_0_ring_emit_gds_switch() argument
4127 amdgpu_ring_write(ring, gds_size); in gfx_v7_0_ring_emit_gds_switch()
5158 adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v7_0_set_gds_init()
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| A D | amdgpu_cs.c | 618 p->job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT; in amdgpu_cs_parser_bos()
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| A D | amdgpu_ttm.c | 1801 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GDS, adev->gds.gds_size); in amdgpu_ttm_init()
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| A D | gfx_v8_0.c | 5198 uint32_t gds_base, uint32_t gds_size, in gfx_v8_0_ring_emit_gds_switch() argument
5216 amdgpu_ring_write(ring, gds_size); in gfx_v8_0_ring_emit_gds_switch()
7105 adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v8_0_set_gds_init()
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| A D | gfx_v10_0.c | 7745 uint32_t gds_base, uint32_t gds_size, in gfx_v10_0_ring_emit_gds_switch() argument
7759 gds_size); in gfx_v10_0_ring_emit_gds_switch()
8887 gds_addr = ALIGN(csa_addr + AMDGPU_CSA_SIZE - adev->gds.gds_size, in gfx_v10_0_ring_emit_de_meta()
9562 adev->gds.gds_size = 0x10000; in gfx_v10_0_set_gds_init()
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