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/linux/arch/arm64/boot/dts/arm/
A Drtsm_ve-aemv8a.dts13 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 interrupt-parent = <&gic>;
97 gic: interrupt-controller@2c001000 { label
98 compatible = "arm,gic-400", "arm,cortex-a15-gic";
139 <0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
140 <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
141 <0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
142 <0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
143 <0 0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
144 <0 0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
[all …]
A Dfvp-base-revc.dts13 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 interrupt-parent = <&gic>;
115 gic: interrupt-controller@2f000000 { label
116 compatible = "arm,gic-v3";
131 compatible = "arm,gic-v3-its";
201 <0 0 1 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
202 <0 0 2 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
203 <0 0 3 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
204 <0 0 4 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
205 <0 0 5 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
[all …]
A Dfoundation-v8.dtsi10 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
145 <0 0 1 &gic 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
146 <0 0 2 &gic 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
147 <0 0 3 &gic 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
148 <0 0 4 &gic 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
149 <0 0 5 &gic 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
150 <0 0 6 &gic 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
151 <0 0 7 &gic 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
152 <0 0 8 &gic 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
[all …]
A Dvexpress-v2m-rs1.dtsi112 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
113 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
114 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
115 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
116 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
117 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
118 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
119 <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
120 <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
121 <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
[all …]
A Djuno-base.dtsi69 gic: interrupt-controller@2c010000 { label
70 compatible = "arm,gic-400", "arm,cortex-a15-gic";
83 compatible = "arm,gic-v2m-frame";
89 compatible = "arm,gic-v2m-frame";
95 compatible = "arm,gic-v2m-frame";
101 compatible = "arm,gic-v2m-frame";
820 <0 0 1 &gic 0 GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
821 <0 0 2 &gic 0 GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
822 <0 0 3 &gic 0 GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
823 <0 0 4 &gic 0 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/linux/drivers/irqchip/
A Dirq-gic.c527 gic_cpu_if_up(gic); in gic_cpu_init()
561 if (WARN_ON(!gic)) in gic_dist_save()
600 if (WARN_ON(!gic)) in gic_dist_restore()
647 if (WARN_ON(!gic)) in gic_cpu_save()
677 if (WARN_ON(!gic)) in gic_cpu_restore()
1183 gic->dist_base.common_base = gic->raw_dist_base; in gic_init_bases()
1184 gic->cpu_base.common_base = gic->raw_cpu_base; in gic_init_bases()
1200 gic); in gic_init_bases()
1252 if (WARN_ON(!gic || gic->domain)) in __gic_init_bases()
1459 *gic = devm_kzalloc(dev, sizeof(**gic), GFP_KERNEL); in gic_of_init_child()
[all …]
A Dbuilt-in.a13 irq-gic.o/
14 irq-gic-common.o/
15 irq-gic-pm.o/
16 irq-gic-v2m.o/
17 irq-gic-v3.o/
18 irq-gic-v3-mbi.o/
19 irq-gic-v3-its.o/
20 irq-gic-v3-its-platform-msi.o/
21 irq-gic-v4.o/
22 irq-gic-v3-its-pci-msi.o/
[all …]
A D.built-in.a.cmd1 …gic.o drivers/irqchip/irq-gic-common.o drivers/irqchip/irq-gic-pm.o drivers/irqchip/irq-gic-v2m.o …
A Dirq-gic-pm.c28 struct gic_chip_data *gic = chip_pm->chip_data; in gic_runtime_resume() local
42 if (!gic) in gic_runtime_resume()
45 gic_dist_restore(gic); in gic_runtime_resume()
46 gic_cpu_restore(gic); in gic_runtime_resume()
54 struct gic_chip_data *gic = chip_pm->chip_data; in gic_runtime_suspend() local
57 gic_dist_save(gic); in gic_runtime_suspend()
58 gic_cpu_save(gic); in gic_runtime_suspend()
A DMakefile30 obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o
31 obj-$(CONFIG_ARM_GIC_PM) += irq-gic-pm.o
32 obj-$(CONFIG_ARCH_REALVIEW) += irq-gic-realview.o
33 obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
34 obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-v3-mbi.o irq-gic-common.o
35 obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
36 obj-$(CONFIG_ARM_GIC_V3_ITS_PCI) += irq-gic-v3-its-pci-msi.o
37 obj-$(CONFIG_ARM_GIC_V3_ITS_FSL_MC) += irq-gic-v3-its-fsl-mc-msi.o
70 obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o
/linux/arch/arm/boot/dts/
A Dbcm5301x.dtsi15 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
88 gic: interrupt-controller@21000 { label
89 compatible = "arm,cortex-a9-gic";
171 <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
174 <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
175 <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
176 <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
177 <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
268 interrupt-parent = <&gic>;
[all …]
A Dvexpress-v2m-rs1.dtsi112 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
113 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
114 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
115 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
116 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
117 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
118 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
119 <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
120 <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
121 <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
[all …]
A Dvexpress-v2m.dtsi33 <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
34 <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
35 <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
36 <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
37 <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
38 <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
39 <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
40 <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
41 <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
42 <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
[all …]
A Dbcm53573.dtsi9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
41 gic: interrupt-controller@1000 { label
42 compatible = "arm,cortex-a7-gic";
82 <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
85 <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
88 <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
89 <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
121 interrupt-parent = <&gic>;
141 interrupt-parent = <&gic>;
[all …]
A Dexynos54xx.dtsi30 interrupt-parent = <&gic>;
83 <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
84 <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
85 <&gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
86 <&gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
87 <&gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
88 <&gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
89 <&gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
90 <&gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
/linux/Documentation/devicetree/bindings/interrupt-controller/
A Darm,gic.yaml29 - arm,arm11mp-gic
30 - arm,cortex-a15-gic
31 - arm,cortex-a7-gic
32 - arm,cortex-a5-gic
33 - arm,cortex-a9-gic
34 - arm,eb11mp-gic
35 - arm,gic-400
37 - arm,tc11mp-gic
42 - const: arm,gic-400
44 - arm,cortex-a15-gic
[all …]
A Drenesas,rza1-irqc.yaml63 #include <dt-bindings/interrupt-controller/arm-gic.h>
71 <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
72 <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
73 <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
74 <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
75 <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
76 <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
77 <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
78 <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
A Dmti,gic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/mti,gic.yaml#
21 const: mti,gic
27 file 'dt-bindings/interrupt-controller/mips-gic.h'. The 2nd cell is the
73 const: mti,gic-timer
107 #include <dt-bindings/interrupt-controller/mips-gic.h>
111 compatible = "mti,gic";
119 compatible = "mti,gic-timer";
125 #include <dt-bindings/interrupt-controller/mips-gic.h>
129 compatible = "mti,gic";
135 compatible = "mti,gic-timer";
[all …]
A Dfsl,ls-extirq.txt41 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
42 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
43 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
44 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
45 <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
46 <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
52 interrupts-extended = <&gic GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
/linux/arch/arm64/boot/dts/xilinx/
A Dzynqmp.dtsi105 interrupt-parent = <&gic>;
133 interrupt-parent = <&gic>;
153 interrupt-parent = <&gic>;
191 interrupt-parent = <&gic>;
218 interrupt-parent = <&gic>;
230 interrupt-parent = <&gic>;
261 interrupt-parent = <&gic>;
274 interrupt-parent = <&gic>;
287 interrupt-parent = <&gic>;
300 interrupt-parent = <&gic>;
[all …]
/linux/arch/arm64/boot/dts/cavium/
A Dthunder2-99xx.dtsi10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic>;
58 gic: interrupt-controller@400080000 { label
59 compatible = "arm,gic-v3";
70 gicits: gic-its@40010000 {
71 compatible = "arm,gic-v3-its";
121 <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
122 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
123 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
124 0 0 0 4 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
[all …]
/linux/Documentation/devicetree/bindings/bus/
A Dbrcm,bus-axi.txt34 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
37 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
40 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
41 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
42 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
43 <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
44 <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
45 <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
/linux/drivers/staging/mt7621-dts/
A Dmt7621.dtsi89 interrupt-parent = <&gic>;
123 interrupt-parent = <&gic>;
159 interrupt-parent = <&gic>;
178 interrupt-parent = <&gic>;
302 interrupt-parent = <&gic>;
317 interrupt-parent = <&gic>;
321 gic: interrupt-controller@1fbc0000 { label
322 compatible = "mti,gic";
331 compatible = "mti,gic-timer";
361 interrupt-parent = <&gic>;
[all …]
/linux/arch/arm64/boot/dts/freescale/
A Ds32v234.dtsi7 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
87 gic: interrupt-controller@7d001000 { label
88 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
104 interrupt-parent = <&gic>;
111 interrupt-parent = <&gic>;
127 interrupt-parent = <&gic>;
/linux/Documentation/devicetree/bindings/pci/
A Dhisilicon,kirin-pcie.yaml54 #include <dt-bindings/interrupt-controller/arm-gic.h>
81 interrupt-map = <0x0 0 0 1 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
82 <0x0 0 0 2 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
83 <0x0 0 0 3 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
84 <0x0 0 0 4 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
113 interrupt-map = <0x0 0 0 1 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
114 <0x0 0 0 2 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
115 <0x0 0 0 3 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
116 <0x0 0 0 4 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;

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