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Searched refs:hsp (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/mailbox/
A Dtegra-hsp.c233 tegra_hsp_writel(hsp, hsp->mask, in tegra_hsp_shared_irq()
284 offset = (1 + (hsp->num_sm / 2) + hsp->num_ss + hsp->num_as) * SZ_64K; in tegra_hsp_doorbell_create()
288 db->channel.hsp = hsp; in tegra_hsp_doorbell_create()
313 struct tegra_hsp *hsp = db->channel.hsp; in tegra_hsp_doorbell_startup() local
395 tegra_hsp_writel(hsp, hsp->mask, HSP_INT_IE(hsp->shared_irq)); in tegra_hsp_mailbox_send_data()
451 tegra_hsp_writel(hsp, hsp->mask, HSP_INT_IE(hsp->shared_irq)); in tegra_hsp_mailbox_startup()
490 tegra_hsp_writel(hsp, hsp->mask, HSP_INT_IE(hsp->shared_irq)); in tegra_hsp_mailbox_shutdown()
585 hsp->mailboxes = devm_kcalloc(dev, hsp->num_sm, sizeof(*hsp->mailboxes), in tegra_hsp_add_mailboxes()
595 mb->channel.hsp = hsp; in tegra_hsp_add_mailboxes()
615 dev_name(hsp->dev), hsp); in tegra_hsp_request_shared_irq()
[all …]
A Dbuilt-in.a14 tegra-hsp.o/
A D.built-in.a.cmd1 …20-mailbox.o drivers/mailbox/qcom-apcs-ipc-mailbox.o drivers/mailbox/tegra-hsp.o drivers/mailbox/z…
A D.tegra-hsp.o.cmd1hsp.o := /usr/bin/ccache /home/test/workspace/code/optee_3.16/build/../toolchains/aarch64/bin/aarc…
3 source_drivers/mailbox/tegra-hsp.o := drivers/mailbox/tegra-hsp.c
5 deps_drivers/mailbox/tegra-hsp.o := \
1044 include/dt-bindings/mailbox/tegra186-hsp.h \
1047 drivers/mailbox/tegra-hsp.o: $(deps_drivers/mailbox/tegra-hsp.o)
1049 $(deps_drivers/mailbox/tegra-hsp.o):
A DMakefile48 obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
/linux/Documentation/devicetree/bindings/mailbox/
A Dnvidia,tegra186-hsp.txt13 - name : Should be hsp
17 - "nvidia,tegra186-hsp"
18 - "nvidia,tegra194-hsp", "nvidia,tegra186-hsp"
57 <dt-bindings/mailbox/tegra186-hsp.h>
61 hsp_top0: hsp@3c00000 {
62 compatible = "nvidia,tegra186-hsp";
/linux/arch/arm64/boot/dts/nvidia/
A Dtegra234.dtsi5 #include <dt-bindings/mailbox/tegra186-hsp.h>
58 hsp_top0: hsp@3c00000 {
59 compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
76 hsp_aon: hsp@c150000 {
77 compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp";
A Dtegra186-p3310.dtsi160 hsp@3c00000 {
A Dtegra194.dtsi5 #include <dt-bindings/mailbox/tegra186-hsp.h>
1184 hsp_top0: hsp@3c00000 {
1185 compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
1362 hsp_aon: hsp@c150000 {
1363 compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
A Dtegra186.dtsi5 #include <dt-bindings/mailbox/tegra186-hsp.h>
1066 hsp_top0: hsp@3c00000 {
1067 compatible = "nvidia,tegra186-hsp";
A Dtegra186-p3509-0000+p3636-0001.dts231 hsp@3c00000 {
/linux/drivers/video/fbdev/
A Dcarminefb.c62 u32 hsp; member
105 .hsp = 672,
117 .hsp = 864,
371 u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; in set_display_parameters() local
380 hsp = par->res->hsp - 1; in set_display_parameters()
393 (hsp)); in set_display_parameters()
/linux/drivers/scsi/lpfc/
A Dlpfc_nportdisc.c89 hsp->cls1.rcvDataSizeLsb); in lpfc_check_sparm()
96 hsp->cls1.rcvDataSizeLsb; in lpfc_check_sparm()
98 hsp->cls1.rcvDataSizeMsb; in lpfc_check_sparm()
106 hsp->cls2.rcvDataSizeLsb); in lpfc_check_sparm()
113 hsp->cls2.rcvDataSizeLsb; in lpfc_check_sparm()
115 hsp->cls2.rcvDataSizeMsb; in lpfc_check_sparm()
123 hsp->cls3.rcvDataSizeLsb); in lpfc_check_sparm()
130 hsp->cls3.rcvDataSizeLsb; in lpfc_check_sparm()
132 hsp->cls3.rcvDataSizeMsb; in lpfc_check_sparm()
143 hsp_value = (hsp->cmn.bbRcvSizeMsb << 8) | hsp->cmn.bbRcvSizeLsb; in lpfc_check_sparm()
[all …]
A Dlpfc_ct.c2977 struct serv_parm *hsp; in lpfc_fdmi_port_attr_max_frame() local
2983 hsp = (struct serv_parm *)&vport->fc_sparam; in lpfc_fdmi_port_attr_max_frame()
2984 ae->un.AttrInt = (((uint32_t) hsp->cmn.bbRcvSizeMsb & 0x0F) << 8) | in lpfc_fdmi_port_attr_max_frame()
2985 (uint32_t) hsp->cmn.bbRcvSizeLsb; in lpfc_fdmi_port_attr_max_frame()
/linux/drivers/clk/imx/
A Dclk-imx31.c40 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
63 clk[hsp] = imx_clk_divider("hsp", "mcu_main", base + MXC_CCM_PDR0, 11, 3); in _mx31_clocks_init()
A Dclk-imx35.c65 /* 0 */ ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, enumerator
130 clk[hsp] = imx_clk_fixed_factor("hsp", "arm", 1, hsp_div[hsp_sel]); in _mx35_clocks_init()
/linux/drivers/video/fbdev/mb862xx/
A Dmb862xxfbdrv.c54 static inline int hsp(struct fb_var_screeninfo *var) in hsp() function
258 pack((fbi->var.hsync_len - 1), hsp(&fbi->var)); in mb862xxfb_set_par()
447 unsigned long hsp, vsp, ht, vt; in mb862xxfb_init_fbinfo() local
470 hsp = (reg & 0xffff) + 1; in mb862xxfb_init_fbinfo()
472 fbi->var.right_margin = hsp - fbi->var.xres; in mb862xxfb_init_fbinfo()
473 fbi->var.left_margin = ht - hsp - fbi->var.hsync_len; in mb862xxfb_init_fbinfo()
/linux/Documentation/devicetree/bindings/firmware/
A Dnvidia,tegra186-bpmp.txt27 - .../mailbox/nvidia,tegra186-hsp.txt
68 hsp_top0: hsp@3c00000 {
/linux/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_hpo_dp_stream_encoder.c203 uint8_t hsp; in dcn31_hpo_dp_stream_enc_set_stream_attribute() local
361 hsp = hw_crtc_timing.flags.HSYNC_POSITIVE_POLARITY ? 0x80 : 0; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
421 MSA_DATA_LANE_0, hsp | (hw_crtc_timing.h_sync_width >> 8), in dcn31_hpo_dp_stream_enc_set_stream_attribute()
/linux/Documentation/devicetree/bindings/serial/
A Dnvidia,tegra194-tcu.txt25 - .../mailbox/nvidia,tegra186-hsp.txt
/linux/Documentation/devicetree/bindings/clock/
A Dimx35-clock.yaml24 hsp 5
A Dimx31-clock.yaml26 hsp 7
/linux/drivers/atm/
A Dhe.c1466 he_dev->hsp = dma_alloc_coherent(&he_dev->pci_dev->dev, in he_start()
1469 if (he_dev->hsp == NULL) { in he_start()
1568 if (he_dev->hsp) in he_stop()
1570 he_dev->hsp, he_dev->hsp_phys); in he_stop()
1646 he_dev->hsp->group[group].rbrq_tail); in he_service_rbrq()
1806 he_dev->hsp->group[group].tbrq_tail); in he_service_tbrq()
A Dhe.h310 struct he_hsp *hsp; member
/linux/drivers/
A Dbuilt-in.a2230 mailbox/tegra-hsp.o/

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