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Searched refs:hw_caps (Results 1 – 25 of 33) sorted by relevance

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/linux/drivers/staging/wfx/
A Dmain.c157 if (wdev->hw_caps.api_version_major < major) in wfx_api_older_than()
379 wdev->hw_caps.firmware_major, wdev->hw_caps.firmware_minor, in wfx_probe()
380 wdev->hw_caps.firmware_build, wdev->hw_caps.firmware_label, in wfx_probe()
381 wdev->hw_caps.api_version_major, wdev->hw_caps.api_version_minor, in wfx_probe()
382 wdev->keyset, wdev->hw_caps.link_mode); in wfx_probe()
386 wdev->hw_caps.firmware_major, in wfx_probe()
387 wdev->hw_caps.firmware_minor, in wfx_probe()
388 wdev->hw_caps.firmware_build); in wfx_probe()
393 wdev->hw_caps.api_version_major); in wfx_probe()
404 if (wdev->hw_caps.region_sel_mode) { in wfx_probe()
[all …]
A Dhif_rx.c83 memcpy(&wdev->hw_caps, body, sizeof(struct hif_ind_startup)); in hif_startup_indication()
84 le16_to_cpus((__le16 *)&wdev->hw_caps.hardware_id); in hif_startup_indication()
85 le16_to_cpus((__le16 *)&wdev->hw_caps.num_inp_ch_bufs); in hif_startup_indication()
86 le16_to_cpus((__le16 *)&wdev->hw_caps.size_inp_ch_buf); in hif_startup_indication()
87 le32_to_cpus((__le32 *)&wdev->hw_caps.supported_rate_mask); in hif_startup_indication()
A Dbh.c185 WARN(len > wdev->hw_caps.size_inp_ch_buf, in tx_helper()
187 len, wdev->hw_caps.size_inp_ch_buf); in tx_helper()
207 if (wdev->hif.tx_buffers_used < wdev->hw_caps.num_inp_ch_bufs) { in bh_work_tx()
A Dwfx.h41 struct hif_ind_startup hw_caps; member
A Ddata_tx.c362 if (skb->len > wvif->wdev->hw_caps.size_inp_ch_buf) { in wfx_tx_inner()
365 skb->len, wvif->wdev->hw_caps.size_inp_ch_buf); in wfx_tx_inner()
/linux/drivers/net/wireless/ath/ath9k/
A Dcommon-init.c134 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { in ath9k_cmn_init_channels_rates()
151 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) { in ath9k_cmn_init_channels_rates()
185 if (ah->caps.hw_caps & ATH9K_HW_CAP_LDPC) in ath9k_cmn_setup_ht_cap()
188 if (ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20) in ath9k_cmn_setup_ht_cap()
234 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_HT)) in ath9k_cmn_reload_chainmask()
237 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) in ath9k_cmn_reload_chainmask()
240 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) in ath9k_cmn_reload_chainmask()
A Dgpio.c129 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT) in ath_start_rfkill_poll()
214 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) { in ath_btcoex_period_timer()
219 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) in ath_btcoex_period_timer()
225 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) { in ath_btcoex_period_timer()
265 (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && in ath_btcoex_no_stomp_timer()
349 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit) in ath9k_btcoex_aggr_limit()
372 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) in ath9k_start_btcoex()
393 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) in ath9k_stop_btcoex()
A Dar9002_mac.c81 if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { in ar9002_hw_get_isr()
87 if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED) in ar9002_hw_get_isr()
108 if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED) { in ar9002_hw_get_isr()
140 if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED) { in ar9002_hw_get_isr()
156 !(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) in ar9002_hw_get_isr()
159 if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { in ar9002_hw_get_isr()
165 if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { in ar9002_hw_get_isr()
A Dinit.c352 if (!(sc->sc_ah->caps.hw_caps & in ath_descdma_setup()
383 if (!(sc->sc_ah->caps.hw_caps & in ath_descdma_setup()
498 pCap->hw_caps &= ~ATH9K_HW_CAP_ANT_DIV_COMB; in ath9k_init_pcoem_platform()
502 pCap->hw_caps |= ATH9K_HW_CAP_BT_ANT_DIV; in ath9k_init_pcoem_platform()
774 (pCap->hw_caps & ATH9K_HW_CAP_BT_ANT_DIV)) in ath9k_init_softc()
868 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) in ath9k_init_txpower_limits()
870 if (ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) in ath9k_init_txpower_limits()
969 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) { in ath9k_set_hw_capab()
1024 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) in ath9k_set_hw_capab()
1030 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) in ath9k_set_hw_capab()
[all …]
A Dhw.c2513 pCap->hw_caps |= ATH9K_HW_CAP_5GHZ; in ath9k_hw_fill_cap_info()
2520 pCap->hw_caps |= ATH9K_HW_CAP_2GHZ; in ath9k_hw_fill_cap_info()
2575 pCap->hw_caps |= ATH9K_HW_CAP_HT; in ath9k_hw_fill_cap_info()
2577 pCap->hw_caps &= ~ATH9K_HW_CAP_HT; in ath9k_hw_fill_cap_info()
2609 pCap->hw_caps |= ATH9K_HW_CAP_LDPC; in ath9k_hw_fill_cap_info()
2631 pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; in ath9k_hw_fill_cap_info()
2646 pCap->hw_caps |= ATH9K_HW_CAP_APM; in ath9k_hw_fill_cap_info()
2658 pCap->hw_caps |= ATH9K_HW_CAP_DFS; in ath9k_hw_fill_cap_info()
2674 pCap->hw_caps |= ATH9K_HW_CAP_MCI; in ath9k_hw_fill_cap_info()
2677 pCap->hw_caps |= ATH9K_HW_CAP_RTT; in ath9k_hw_fill_cap_info()
[all …]
A Dar9003_mac.c233 if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { in ar9003_hw_get_isr()
239 if ((pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) in ar9003_hw_get_isr()
266 if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { in ar9003_hw_get_isr()
281 if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED) in ar9003_hw_get_isr()
295 if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { in ar9003_hw_get_isr()
304 if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) { in ar9003_hw_get_isr()
A Drecv.c26 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP); in ath9k_check_auto_sleep()
283 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) in ath_rx_init()
338 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { in ath_rx_cleanup()
446 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { in ath_startrecv()
475 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) in ath_flushrecv()
491 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) in ath_stoprecv()
970 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)) in ath9k_antenna_check()
984 if (pCap->hw_caps & ATH9K_HW_CAP_BT_ANT_DIV) { in ath9k_antenna_check()
1071 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); in ath_rx_tasklet()
A Dmain.c444 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) in ath9k_tasklet()
452 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && in ath9k_tasklet()
460 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { in ath9k_tasklet()
578 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) in ath_isr()
701 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) in ath9k_start()
717 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) in ath9k_start()
786 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) in ath9k_tx()
868 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { in ath9k_txq_has_key()
1453 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { in ath9k_enable_ps()
1473 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { in ath9k_disable_ps()
[all …]
A Ddfs_debug.c50 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_DFS) ? in read_file_dfs()
A Dhw.h296 u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */ member
470 (IS_CHAN_5GHZ(_c) && ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK))
1169 (ah->caps.hw_caps & ATH9K_HW_CAP_MCI); in ath9k_hw_mci_is_enabled()
A Dmac.c751 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) in ath9k_hw_beaconq_setup()
962 if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) in ath9k_hw_set_interrupts()
1017 if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { in ath9k_hw_set_interrupts()
A Dhtc_drv_gpio.c332 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT) in ath9k_start_rfkill_poll()
A Ddebug.c258 if (!(pCap->hw_caps & ATH9K_HW_CAP_BT_ANT_DIV)) in write_file_bt_ant_diversity()
321 if (!(pCap->hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)) { in read_file_antenna_diversity()
478 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { in ath_debug_stat_interrupt()
538 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { in read_file_interrupt()
A Dxmit.c844 !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) in ath_compute_num_delims()
1732 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { in ath_txq_setup()
1850 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { in ath_draintxq()
1998 edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); in ath_tx_txqaddbuf()
2139 if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && IS_CHAN_5GHZ(curchan) && in ath_txchainmask_reduction()
2790 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) in ath_tx_init()
A Dar9003_calib.c1310 if ((ah->caps.hw_caps & ATH9K_HW_CAP_RTT) && !run_rtt_cal) in ar9003_hw_do_pcoem_manual_peak_cal()
1322 if ((ah->caps.hw_caps & ATH9K_HW_CAP_RTT) && caldata) { in ar9003_hw_do_pcoem_manual_peak_cal()
1404 bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT); in ar9003_hw_init_cal_pcoem()
A Dhtc_drv_init.c763 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) in ath9k_set_hw_capab()
766 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) in ath9k_set_hw_capab()
/linux/drivers/net/ethernet/aquantia/atlantic/
A Daq_ethtool.c833 const struct aq_hw_caps_s *hw_caps; in aq_set_ringparam() local
839 hw_caps = cfg->aq_hw_caps; in aq_set_ringparam()
851 cfg->rxds = max(ring->rx_pending, hw_caps->rxds_min); in aq_set_ringparam()
852 cfg->rxds = min(cfg->rxds, hw_caps->rxds_max); in aq_set_ringparam()
855 cfg->txds = max(ring->tx_pending, hw_caps->txds_min); in aq_set_ringparam()
856 cfg->txds = min(cfg->txds, hw_caps->txds_max); in aq_set_ringparam()
/linux/include/linux/platform_data/
A Demif_plat.h115 u32 hw_caps; member
/linux/drivers/memory/
A Demif.c612 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) { in emif_interrupt_handler()
662 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) in clear_all_interrupts()
674 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) in disable_and_clear_all_interrupts()
698 if (emif->plat_data->hw_caps & EMIF_HW_CAPS_LL_INTERFACE) { in setup_interrupts()
957 pd->hw_caps |= EMIF_HW_CAPS_LL_INTERFACE; in of_get_memory_device_details()
/linux/drivers/gpu/drm/amd/pm/inc/
A Dhardwaremanager.h261 uint32_t hw_caps[PHM_MAX_NUM_CAPS_ULONG_ENTRIES]; member

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