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Searched refs:hwirq (Results 1 – 25 of 360) sorted by relevance

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/linux/Documentation/translations/zh_CN/core-api/irq/
A Dirq-domain.rst32 提供任何对控制器本地IRQ(hwirq)号到Linux IRQ号空间的反向映射的支持。
51 irq_domain和一个hwirq号作为参数。 如果hwirq的映射还不存在，那么它将分配
62 如在irq_chip回调中），那么可以直接从irq_data->hwirq中获得。
78 线性反向映射维护了一个固定大小的表，该表以hwirq号为索引。 当一个hwirq被映射
79 时，会给hwirq分配一个irq_desc，并将irq号存储在表中。
83 必须尽可能大的hwirq号。
99 irq_domain维护着从hwirq号到Linux IRQ的radix的树状映射。 当一个hwirq被映射时，
100 一个irq_desc被分配，hwirq被用作radix树的查找键。
102 如果hwirq号可以非常大，树状映射是一个很好的选择，因为它不需要分配一个和最大hwirq
103 号一样大的表。 缺点是，hwirq到IRQ号的查找取决于表中有多少条目。
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/linux/drivers/irqchip/
A Dirq-mchp-eic.c103 irq_set_irq_wake(eic->irqs[d->hwirq], on); in mchp_eic_irq_set_wake()
105 eic->wakeup_source |= BIT(d->hwirq); in mchp_eic_irq_set_wake()
107 eic->wakeup_source &= ~BIT(d->hwirq); in mchp_eic_irq_set_wake()
114 unsigned int hwirq; in mchp_eic_irq_suspend() local
116 for (hwirq = 0; hwirq < MCHP_EIC_NIRQ; hwirq++) in mchp_eic_irq_suspend()
118 MCHP_EIC_SCFG(hwirq)); in mchp_eic_irq_suspend()
128 unsigned int hwirq; in mchp_eic_irq_resume() local
133 for (hwirq = 0; hwirq < MCHP_EIC_NIRQ; hwirq++) in mchp_eic_irq_resume()
135 MCHP_EIC_SCFG(hwirq)); in mchp_eic_irq_resume()
160 irq_hw_number_t hwirq; in mchp_eic_domain_alloc() local
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A Dirq-pruss-intc.c193 reg_idx = hwirq / 32; in pruss_intc_map()
194 val = BIT(hwirq % 32); in pruss_intc_map()
208 hwirq, ch, host); in pruss_intc_map()
241 reg_idx = hwirq / 32; in pruss_intc_unmap()
253 hwirq, ch, host); in pruss_intc_unmap()
293 unsigned int hwirq = data->hwirq; in pruss_intc_irq_ack() local
301 unsigned int hwirq = data->hwirq; in pruss_intc_irq_mask() local
309 unsigned int hwirq = data->hwirq; in pruss_intc_irq_unmask() local
491 int hwirq, err; in pruss_intc_irq_handler() local
606 unsigned int hwirq; in pruss_intc_remove() local
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A Dirq-loongson-pch-pic.c71 pch_pic_bitset(priv, PCH_PIC_MASK, d->hwirq); in pch_pic_mask_irq()
79 writel(BIT(PIC_REG_BIT(d->hwirq)), in pch_pic_unmask_irq()
83 pch_pic_bitclr(priv, PCH_PIC_MASK, d->hwirq); in pch_pic_unmask_irq()
94 pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq); in pch_pic_set_type()
99 pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq); in pch_pic_set_type()
104 pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq); in pch_pic_set_type()
109 pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq); in pch_pic_set_type()
126 if (reg & BIT(PIC_REG_BIT(d->hwirq))) { in pch_pic_ack_irq()
127 writel(BIT(PIC_REG_BIT(d->hwirq)), in pch_pic_ack_irq()
147 unsigned long hwirq; in pch_pic_alloc() local
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A Dirq-ls-extirq.c30 irq_hw_number_t hwirq = data->hwirq; in ls_extirq_set_type() local
34 mask = 1U << (31 - hwirq); in ls_extirq_set_type()
36 mask = 1U << hwirq; in ls_extirq_set_type()
76 irq_hw_number_t hwirq; in ls_extirq_domain_alloc() local
81 hwirq = fwspec->param[0]; in ls_extirq_domain_alloc()
82 if (hwirq >= priv->nirq) in ls_extirq_domain_alloc()
113 u32 hwirq, intsize, j; in ls_extirq_parse_map() local
117 hwirq = be32_to_cpup(map); in ls_extirq_parse_map()
118 if (hwirq >= MAXIRQ) in ls_extirq_parse_map()
120 priv->nirq = max(priv->nirq, hwirq + 1); in ls_extirq_parse_map()
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A Dirq-mvebu-sei.c59 u32 reg_idx = SEI_IRQ_REG_IDX(d->hwirq); in mvebu_sei_ack_irq()
74 reg |= BIT(SEI_IRQ_REG_BIT(d->hwirq)); in mvebu_sei_mask_irq()
88 reg &= ~BIT(SEI_IRQ_REG_BIT(d->hwirq)); in mvebu_sei_unmask_irq()
199 unsigned long *hwirq, in mvebu_sei_ap_translate() argument
202 *hwirq = fwspec->param[0]; in mvebu_sei_ap_translate()
213 unsigned long hwirq; in mvebu_sei_ap_alloc() local
244 clear_bit(hwirq, sei->cp_msi_bitmap); in mvebu_sei_cp_release_irq()
254 unsigned long hwirq; in mvebu_sei_cp_domain_alloc() local
264 if (hwirq < sei->caps->cp_range.size) in mvebu_sei_cp_domain_alloc()
265 set_bit(hwirq, sei->cp_msi_bitmap); in mvebu_sei_cp_domain_alloc()
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A Dirq-or1k-pic.c28 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_mask()
33 mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->hwirq)); in or1k_pic_unmask()
38 mtspr(SPR_PICSR, (1UL << data->hwirq)); in or1k_pic_ack()
43 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_mask_ack()
44 mtspr(SPR_PICSR, (1UL << data->hwirq)); in or1k_pic_mask_ack()
55 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_ack()
103 int hwirq; in pic_get_irq() local
105 hwirq = ffs(mfspr(SPR_PICSR) >> first); in pic_get_irq()
106 if (!hwirq) in pic_get_irq()
109 hwirq = hwirq + first - 1; in pic_get_irq()
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A Dirq-ativic32.c20 __nds32__mtsr_dsb(BIT(data->hwirq), NDS32_SR_INT_PEND2); in ativic32_ack_irq()
39 u32 bit = 1 << data->hwirq; in nointc_set_wake()
43 __assign_bit(data->hwirq, &irq_orig_bit, true); in nointc_set_wake()
45 __assign_bit(data->hwirq, &irq_orig_bit, false); in nointc_set_wake()
47 __assign_bit(data->hwirq, &int_mask, true); in nointc_set_wake()
48 __assign_bit(data->hwirq, &wake_mask, true); in nointc_set_wake()
52 __assign_bit(data->hwirq, &int_mask, false); in nointc_set_wake()
54 __assign_bit(data->hwirq, &wake_mask, false); in nointc_set_wake()
55 __assign_bit(data->hwirq, &irq_orig_bit, false); in nointc_set_wake()
111 irq_hw_number_t hwirq = get_intr_src(); in ativic32_handle_irq() local
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A Dirq-ixp4xx.c84 val &= ~BIT(d->hwirq); in ixp4xx_irq_mask()
100 val |= BIT(d->hwirq - 32); in ixp4xx_irq_unmask()
104 val |= BIT(d->hwirq); in ixp4xx_irq_unmask()
158 irq_hw_number_t hwirq; in ixp4xx_irq_domain_alloc() local
177 hwirq + i, in ixp4xx_irq_domain_alloc()
220 int hwirq; member
227 .hwirq = 0,
232 .hwirq = 8,
237 .hwirq = 30,
243 .hwirq = 32,
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A Dirq-mbigen.c71 hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; in get_mbigen_vec_reg()
72 nid = hwirq / IRQS_PER_MBIGEN_NODE + 1; in get_mbigen_vec_reg()
73 pin = hwirq % IRQS_PER_MBIGEN_NODE; in get_mbigen_vec_reg()
84 hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; in get_mbigen_type_reg()
85 nid = hwirq / IRQS_PER_MBIGEN_NODE + 1; in get_mbigen_type_reg()
98 unsigned int ofst = (hwirq / 32) * 4; in get_mbigen_clear_reg()
100 *mask = 1 << (hwirq % 32); in get_mbigen_clear_reg()
156 base += get_mbigen_vec_reg(d->hwirq); in mbigen_write_msg()
170 unsigned long *hwirq, in mbigen_domain_translate() argument
181 *hwirq = fwspec->param[0]; in mbigen_domain_translate()
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A Dirq-sifive-plic.c85 int hwirq, int enable) in plic_toggle() argument
88 u32 hwirq_mask = 1 << (hwirq % 32); in plic_toggle()
186 irq_hw_number_t hwirq) in plic_irqdomain_map() argument
201 irq_hw_number_t hwirq; in plic_irq_domain_alloc() local
235 irq_hw_number_t hwirq; in plic_handle_irq() local
241 while ((hwirq = readl(claim))) { in plic_handle_irq()
243 hwirq); in plic_handle_irq()
246 hwirq); in plic_handle_irq()
315 irq_hw_number_t hwirq; in plic_init() local
371 for (hwirq = 1; hwirq <= nr_irqs; hwirq++) in plic_init()
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A Dirq-xilinx-intc.c65 unsigned long mask = BIT(d->hwirq); in intc_enable_or_unmask()
83 pr_debug("irq-xilinx: disable: %ld\n", d->hwirq); in intc_disable_or_mask()
84 xintc_write(irqc, CIE, BIT(d->hwirq)); in intc_disable_or_mask()
91 pr_debug("irq-xilinx: ack: %ld\n", d->hwirq); in intc_ack()
92 xintc_write(irqc, IAR, BIT(d->hwirq)); in intc_ack()
98 unsigned long mask = BIT(d->hwirq); in intc_mask_ack()
116 u32 hwirq; in xintc_get_irq() local
118 hwirq = xintc_read(primary_intc, IVR); in xintc_get_irq()
119 if (hwirq != -1U) in xintc_get_irq()
157 u32 hwirq = xintc_read(irqc, IVR); in xil_intc_irq_handler() local
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A Dirq-partition-percpu.c26 unsigned int cpu, unsigned int hwirq) in partition_check_cpu() argument
28 return cpumask_test_cpu(cpu, &part->parts[hwirq].mask); in partition_check_cpu()
37 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && in partition_irq_mask()
101 seq_printf(p, " %5s-%lu", chip->name, data->hwirq); in partition_irq_print_chip()
118 int hwirq; in partition_handle_irq() local
122 for_each_set_bit(hwirq, part->bitmap, part->nr_parts) { in partition_handle_irq()
123 if (partition_check_cpu(part, cpu, hwirq)) in partition_handle_irq()
127 if (unlikely(hwirq == part->nr_parts)) in partition_handle_irq()
130 generic_handle_domain_irq(part->domain, hwirq); in partition_handle_irq()
139 irq_hw_number_t hwirq; in partition_domain_alloc() local
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A Dirq-sni-exiu.c44 writel(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_eoi()
88 val |= BIT(d->hwirq); in exiu_irq_set_type()
90 val &= ~BIT(d->hwirq); in exiu_irq_set_type()
95 val &= ~BIT(d->hwirq); in exiu_irq_set_type()
97 val |= BIT(d->hwirq); in exiu_irq_set_type()
121 unsigned long *hwirq, in exiu_domain_translate() argument
133 *hwirq = fwspec->param[1] - info->spi_base; in exiu_domain_translate()
138 *hwirq = fwspec->param[0]; in exiu_domain_translate()
150 irq_hw_number_t hwirq; in exiu_domain_alloc() local
159 hwirq = fwspec->param[1] - info->spi_base; in exiu_domain_alloc()
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A Dirq-mmp.c71 int hwirq; in icu_mask_ack_irq() local
74 hwirq = d->irq - data->virq_base; in icu_mask_ack_irq()
95 int hwirq; in icu_mask_irq() local
98 hwirq = d->irq - data->virq_base; in icu_mask_irq()
124 int hwirq; in icu_unmask_irq() local
227 int hwirq; in mmp_handle_irq() local
230 if (!(hwirq & SEL_INT_PENDING)) in mmp_handle_irq()
232 hwirq &= SEL_INT_NUM_MASK; in mmp_handle_irq()
238 int hwirq; in mmp2_handle_irq() local
241 if (!(hwirq & SEL_INT_PENDING)) in mmp2_handle_irq()
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/linux/arch/powerpc/sysdev/
A Dmpic_u3msi.c97 return 0xf8004000 | (hwirq << 4); in find_u4_magic_addr()
105 irq_hw_number_t hwirq; in u3msi_teardown_msi_irqs() local
111 hwirq = virq_to_hw(entry->irq); in u3msi_teardown_msi_irqs()
126 int hwirq; in u3msi_setup_msi_irqs() local
141 if (hwirq < 0) { in u3msi_setup_msi_irqs()
143 return hwirq; in u3msi_setup_msi_irqs()
146 addr = find_ht_magic_addr(pdev, hwirq); in u3msi_setup_msi_irqs()
164 virq, hwirq, (unsigned long)addr); in u3msi_setup_msi_irqs()
167 virq, hwirq, (unsigned long)addr); in u3msi_setup_msi_irqs()
168 msg.data = hwirq; in u3msi_setup_msi_irqs()
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/linux/arch/powerpc/platforms/85xx/
A Dsocrates_fpga_pic.c112 irq_line = fpga_irqs[hwirq].irq_line; in socrates_fpga_pic_ack()
116 mask |= (1 << (hwirq + 16)); in socrates_fpga_pic_ack()
128 irq_line = fpga_irqs[hwirq].irq_line; in socrates_fpga_pic_mask()
132 mask &= ~(1 << hwirq); in socrates_fpga_pic_mask()
148 mask &= ~(1 << hwirq); in socrates_fpga_pic_mask_ack()
149 mask |= (1 << (hwirq + 16)); in socrates_fpga_pic_mask_ack()
165 mask |= (1 << hwirq); in socrates_fpga_pic_unmask()
181 mask |= (1 << (hwirq + 16)); in socrates_fpga_pic_eoi()
210 mask |= (1 << hwirq); in socrates_fpga_pic_set_type()
212 mask &= ~(1 << hwirq); in socrates_fpga_pic_set_type()
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/linux/arch/powerpc/platforms/powernv/
A Dpci-cxl.c42 int hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, num); in pnv_cxl_alloc_hwirqs() local
44 if (hwirq < 0) { in pnv_cxl_alloc_hwirqs()
49 return phb->msi_base + hwirq; in pnv_cxl_alloc_hwirqs()
67 int i, hwirq; in pnv_cxl_release_hwirq_ranges() local
75 hwirq = irqs->offset[i] - phb->msi_base; in pnv_cxl_release_hwirq_ranges()
76 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, in pnv_cxl_release_hwirq_ranges()
87 int i, hwirq, try; in pnv_cxl_alloc_hwirq_ranges() local
96 if (hwirq >= 0) in pnv_cxl_alloc_hwirq_ranges()
103 irqs->offset[i] = phb->msi_base + hwirq; in pnv_cxl_alloc_hwirq_ranges()
133 unsigned int xive_num = hwirq - phb->msi_base; in pnv_cxl_ioda_msi_setup()
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/linux/arch/powerpc/platforms/pasemi/
A Dmsi.c61 irq_hw_number_t hwirq; in pasemi_msi_teardown_msi_irqs() local
69 hwirq = virq_to_hw(entry->irq); in pasemi_msi_teardown_msi_irqs()
83 int hwirq; in pasemi_msi_setup_msi_irqs() local
99 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, in pasemi_msi_setup_msi_irqs()
101 if (hwirq < 0) { in pasemi_msi_setup_msi_irqs()
103 return hwirq; in pasemi_msi_setup_msi_irqs()
106 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); in pasemi_msi_setup_msi_irqs()
109 hwirq); in pasemi_msi_setup_msi_irqs()
110 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, in pasemi_msi_setup_msi_irqs()
126 "addr 0x%x\n", virq, hwirq, msg.address_lo); in pasemi_msi_setup_msi_irqs()
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/linux/drivers/pinctrl/mediatek/
A Dmtk-eint.c89 u32 mask = BIT(hwirq & 0x1f); in mtk_eint_flip_edge()
104 hwirq); in mtk_eint_flip_edge()
113 u32 mask = BIT(d->hwirq & 0x1f); in mtk_eint_mask()
125 u32 mask = BIT(d->hwirq & 0x1f); in mtk_eint_unmask()
133 if (eint->dual_edge[d->hwirq]) in mtk_eint_unmask()
150 u32 mask = BIT(d->hwirq & 0x1f); in mtk_eint_ack()
168 d->irq, d->hwirq, type); in mtk_eint_set_type()
173 eint->dual_edge[d->hwirq] = 1; in mtk_eint_set_type()
175 eint->dual_edge[d->hwirq] = 0; in mtk_eint_set_type()
210 int shift = d->hwirq & 0x1f; in mtk_eint_irq_set_wake()
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/linux/drivers/pci/controller/
A Dpcie-iproc-msi.c152 unsigned long hwirq) in iproc_msi_addr_offset() argument
203 return (hwirq - hwirq_to_cpu(msi, hwirq)); in hwirq_to_canonical_hwirq()
219 data->hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq) + target_cpu; in iproc_msi_irq_set_affinity()
251 int hwirq, i; in iproc_msi_irq_domain_alloc() local
267 if (hwirq < 0) in iproc_msi_irq_domain_alloc()
285 unsigned int hwirq; in iproc_msi_irq_domain_free() local
289 hwirq = hwirq_to_canonical_hwirq(msi, data->hwirq); in iproc_msi_irq_domain_free()
306 u32 hwirq; in decode_msi_hwirq() local
311 hwirq = readl(msg); in decode_msi_hwirq()
312 hwirq = (hwirq >> 5) + (hwirq & 0x1f); in decode_msi_hwirq()
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/linux/kernel/irq/
A Dirqdomain.c534 irq_hw_number_t hwirq; in irq_domain_disassociate() local
540 hwirq = irq_data->hwirq; in irq_domain_disassociate()
555 irq_data->hwirq = 0; in irq_domain_disassociate()
577 irq_data->hwirq = hwirq; in irq_domain_associate()
592 irq_data->hwirq = 0; in irq_domain_associate()
740 hwirq, type); in irq_domain_translate()
764 irq_hw_number_t hwirq; in irq_create_fwspec_mapping() local
911 if (data && data->hwirq == hwirq) in __irq_resolve_mapping()
1071 irq_data->hwirq = 0; in irq_domain_reset_irq_data()
1144 irq_hw_number_t hwirq = data->hwirq; in irq_domain_remove_irq() local
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/linux/drivers/misc/cxl/
A Dirq.c191 irq_off = hwirq - ctx->irqs.offset[r]; in cxl_irq_afu()
201 ctx->pe, irq, hwirq); in cxl_irq_afu()
207 afu_irq, ctx->pe, irq, hwirq); in cxl_irq_afu()
230 virq = irq_create_mapping(NULL, hwirq); in cxl_map_irq()
262 int hwirq, virq; in cxl_register_one_irq() local
265 return hwirq; in cxl_register_one_irq()
270 *dest_hwirq = hwirq; in cxl_register_one_irq()
358 irq_hw_number_t hwirq; in afu_register_hwirqs() local
366 hwirq = ctx->irqs.offset[r]; in afu_register_hwirqs()
403 irq_hw_number_t hwirq; in afu_release_irqs() local
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/linux/arch/arm/mach-imx/
A Dgpc.c91 unsigned int idx = d->hwirq / 32; in imx_gpc_irq_set_wake()
94 mask = 1 << d->hwirq % 32; in imx_gpc_irq_set_wake()
132 val &= ~(1 << hwirq % 32); in imx_gpc_hwirq_unmask()
143 val |= 1 << (hwirq % 32); in imx_gpc_hwirq_mask()
149 imx_gpc_hwirq_unmask(d->hwirq); in imx_gpc_irq_unmask()
155 imx_gpc_hwirq_mask(d->hwirq); in imx_gpc_irq_mask()
174 unsigned long *hwirq, in imx_gpc_domain_translate() argument
185 *hwirq = fwspec->param[1]; in imx_gpc_domain_translate()
199 irq_hw_number_t hwirq; in imx_gpc_domain_alloc() local
207 hwirq = fwspec->param[1]; in imx_gpc_domain_alloc()
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/linux/drivers/gpio/
A Dgpio-hlwd.c65 int hwirq; in hlwd_gpio_irqhandler() local
123 mask &= ~BIT(data->hwirq); in hlwd_gpio_irq_mask()
137 mask |= BIT(data->hwirq); in hlwd_gpio_irq_unmask()
156 level &= ~BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
157 level |= state ^ BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
161 hlwd->rising_edge &= ~BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
162 hlwd->falling_edge &= ~BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
164 hlwd->rising_edge |= BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
166 hlwd->falling_edge |= BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
183 level |= BIT(data->hwirq); in hlwd_gpio_irq_set_type()
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