| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| A D | dc_stream.c | 278 dc->hwss.set_cursor_attribute(pipe_ctx); in program_cursor_attributes()
279 if (dc->hwss.set_cursor_sdr_white_level) in program_cursor_attributes()
382 dc->hwss.set_cursor_position(pipe_ctx); in program_cursor_position()
474 if (dc->hwss.enable_writeback) { in dc_stream_add_writeback()
486 if (dc->hwss.enable_writeback) { in dc_stream_add_writeback()
544 if (dc->hwss.disable_writeback) in dc_stream_remove_writeback()
554 if (dc->hwss.mmhubbub_warmup) in dc_stream_warmup_writeback()
649 if (!dc->hwss.dmdata_status_done) in dc_stream_dmdata_status_done()
661 return dc->hwss.dmdata_status_done(pipe); in dc_stream_dmdata_status_done()
677 if (!dc->hwss.program_dmdata_engine) in dc_stream_set_dynamic_metadata()
[all …]
|
| A D | dc.c | 424 dc->hwss.set_drr(&pipe, in dc_stream_adjust_vmin_vmax()
1289 dc->hwss.init_hw(dc); in dc_hardware_init()
1638 dc->hwss.setup_stereo) in dc_enable_stereo()
1668 if (dc->hwss.z10_restore) in dc_z10_restore()
1669 dc->hwss.z10_restore(dc); in dc_z10_restore()
1674 if (dc->hwss.z10_save_init) in dc_z10_save_init()
1675 dc->hwss.z10_save_init(dc); in dc_z10_save_init()
1771 dc->hwss.setup_stereo) in dc_commit_state_no_check()
3290 dc->hwss.init_hw(dc); in dc_set_power_state()
3495 if (dc->hwss.set_clock) in dc_set_clock()
[all …]
|
| A D | dc_vm_helper.c | 42 if (dc->hwss.init_sys_ctx) { in dc_setup_system_context()
43 num_vmids = dc->hwss.init_sys_ctx(dc->hwseq, dc, pa_config); in dc_setup_system_context()
60 dc->hwss.init_vm_ctx(dc->hwseq, dc, va_config, vmid); in dc_setup_vm_context()
|
| A D | dc_link_hwss.c | 96 link->dc->hwss.edp_power_control(link, true); in dp_enable_link_phy()
97 link->dc->hwss.edp_wait_for_hpd_ready(link, true); in dp_enable_link_phy()
259 if (link->dc->hwss.edp_backlight_control) in dp_disable_link_phy()
260 link->dc->hwss.edp_backlight_control(link, false); in dp_disable_link_phy()
269 link->dc->hwss.edp_power_control(link, false); in dp_disable_link_phy()
454 link->dc->hwss.disable_stream(&pipes[i]); in dp_retrain_link_dp_test()
475 link->dc->hwss.enable_stream(&pipes[i]); in dp_retrain_link_dp_test()
477 link->dc->hwss.unblank_stream(&pipes[i], in dp_retrain_link_dp_test()
|
| A D | dc_link.c | 239 link->dc->hwss.edp_wait_for_T12(link); in dc_link_wait_for_t12()
2938 dc->hwss.set_backlight_level( in dc_link_set_backlight_level()
4072 dc->hwss.enable_stream(pipe_ctx); in fpga_dp_hpo_enable_link_and_stream()
4231 dc->hwss.update_info_frame(pipe_ctx);
4323 dc->hwss.enable_stream(pipe_ctx);
4342 dc->hwss.unblank_stream(pipe_ctx,
4399 dc->hwss.blank_stream(pipe_ctx);
4446 dc->hwss.disable_stream(pipe_ctx);
4448 dc->hwss.disable_stream(pipe_ctx);
4454 dc->hwss.disable_stream(pipe_ctx);
[all …]
|
| A D | dc_surface.c | 169 dc->hwss.update_pending_status(pipe_ctx); in dc_plane_get_status()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| A D | dce80_hw_sequencer.c | 50 dc->hwss.pipe_control_lock = dce_pipe_control_lock; in dce80_hw_sequencer_construct()
51 dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth; in dce80_hw_sequencer_construct()
52 dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth; in dce80_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_hw_sequencer.c | 411 dc->hwss.update_plane_addr(dc, pipe_ctx); in dce60_apply_ctx_for_surface()
426 dc->hwss.apply_ctx_for_surface = dce60_apply_ctx_for_surface; in dce60_hw_sequencer_construct()
427 dc->hwss.cursor_lock = dce60_pipe_control_lock; in dce60_hw_sequencer_construct()
428 dc->hwss.pipe_control_lock = dce60_pipe_control_lock; in dce60_hw_sequencer_construct()
429 dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth; in dce60_hw_sequencer_construct()
430 dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth; in dce60_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_hwseq.c | 422 dc->hwss.update_writeback(dc, &wb_info, context); in dcn30_program_all_writeback_pipes_in_tree()
600 dc->hwss.edp_backlight_control && in dcn30_init_hw()
601 dc->hwss.power_down && in dcn30_init_hw()
602 dc->hwss.edp_power_control) { in dcn30_init_hw()
603 dc->hwss.edp_backlight_control(edp_link, false); in dcn30_init_hw()
604 dc->hwss.power_down(dc); in dcn30_init_hw()
605 dc->hwss.edp_power_control(edp_link, false); in dcn30_init_hw()
612 dc->hwss.power_down) { in dcn30_init_hw()
613 dc->hwss.power_down(dc); in dcn30_init_hw()
793 dc->hwss.does_plane_fit_in_mall && in dcn30_apply_idle_power_optimizations()
[all …]
|
| A D | dcn30_init.c | 144 dc->hwss = dcn30_funcs; in dcn30_hw_sequencer_construct()
148 dc->hwss.init_hw = dcn20_fpga_init_hw; in dcn30_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/ |
| A D | clk_mgr.c | 98 if (dc->hwss.exit_optimized_pwr_state) in clk_mgr_exit_optimized_pwr_state()
99 dc->hwss.exit_optimized_pwr_state(dc, dc->current_state); in clk_mgr_exit_optimized_pwr_state()
133 if (dc->hwss.optimize_pwr_state) in clk_mgr_optimize_pwr_state()
134 dc->hwss.optimize_pwr_state(dc, dc->current_state); in clk_mgr_optimize_pwr_state()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_hwseq.c | 1030 dc->hwss.set_disp_pattern_generator(dc, in dcn20_blank_pixel_data()
1041 dc->hwss.set_disp_pattern_generator(dc, in dcn20_blank_pixel_data()
1055 dc->hwss.set_pipe(pipe_ctx); in dcn20_blank_pixel_data()
1509 dc->hwss.set_cursor_position(pipe_ctx); in dcn20_update_dchubp_dpp()
1510 dc->hwss.set_cursor_attribute(pipe_ctx); in dcn20_update_dchubp_dpp()
1512 if (dc->hwss.set_cursor_sdr_white_level) in dcn20_update_dchubp_dpp()
1522 dc->hwss.program_gamut_remap(pipe_ctx); in dcn20_update_dchubp_dpp()
1525 dc->hwss.program_output_csc(dc, in dcn20_update_dchubp_dpp()
1681 dc->hwss.program_triplebuffer( in dcn20_program_front_end_for_ctx()
1866 dc->hwss.prepare_bandwidth(dc, context); in dcn20_update_bandwidth()
[all …]
|
| A D | dcn20_init.c | 139 dc->hwss = dcn20_funcs; in dcn20_hw_sequencer_construct()
143 dc->hwss.init_hw = dcn20_fpga_init_hw; in dcn20_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce100/ |
| A D | dce100_hw_sequencer.c | 139 dc->hwss.prepare_bandwidth = dce100_prepare_bandwidth; in dce100_hw_sequencer_construct()
140 dc->hwss.optimize_bandwidth = dce100_optimize_bandwidth; in dce100_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hw_sequencer.c | 1358 dc->hwss.disable_plane(dc, pipe_ctx); in dcn10_init_pipes()
1587 dc->hwss.power_down && in dcn10_power_down_on_boot()
1588 dc->hwss.edp_power_control) { in dcn10_power_down_on_boot()
1590 dc->hwss.power_down(dc); in dcn10_power_down_on_boot()
1598 dc->hwss.power_down) { in dcn10_power_down_on_boot()
1599 dc->hwss.power_down(dc); in dcn10_power_down_on_boot()
1866 if (!dc->hwss.calc_vupdate_position || !dc->hwss.get_position) in delay_cursor_until_vupdate()
2721 dc->hwss.set_cursor_position(pipe_ctx); in dcn10_update_dchubp_dpp()
2730 dc->hwss.program_gamut_remap(pipe_ctx); in dcn10_update_dchubp_dpp()
2732 dc->hwss.program_output_csc(dc, in dcn10_update_dchubp_dpp()
[all …]
|
| A D | dcn10_init.c | 122 dc->hwss = dcn10_funcs; in dcn10_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_init.c | 147 dc->hwss = dcn31_funcs; in dcn31_hw_sequencer_construct()
151 dc->hwss.init_hw = dcn20_fpga_init_hw; in dcn31_hw_sequencer_construct()
|
| A D | dcn31_hwseq.c | 528 dc->hwss.set_abm_immediate_disable(pipe_ctx); in dcn31_reset_back_end_for_pipe()
555 dc->hwss.disable_audio_stream(pipe_ctx); in dcn31_reset_back_end_for_pipe()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_init.c | 145 dc->hwss = dcn21_funcs; in dcn21_hw_sequencer_construct()
149 dc->hwss.init_hw = dcn20_fpga_init_hw; in dcn21_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| A D | dcn201_init.c | 129 dc->hwss = dcn201_funcs; in dcn201_hw_sequencer_construct()
|
| A D | dcn201_hwseq.c | 353 dc->hwss.disable_plane(dc, pipe_ctx); in dcn201_init_hw()
499 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, &blnd_cfg.black_color, mpcc_id); in dcn201_update_mpcc()
524 dc->hwss.update_visual_confirm_color(dc, pipe_ctx, &blnd_cfg.black_color, mpcc_id); in dcn201_update_mpcc()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| A D | dcn301_init.c | 145 dc->hwss = dcn301_funcs; in dcn301_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_hw_sequencer.c | 269 dc->hwss.update_dchub = dce120_update_dchub; in dce120_hw_sequencer_construct()
|
| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_hw_sequencer.c | 682 dc->hwss.update_info_frame(pipe_ctx); in dce110_enable_stream()
1216 dc->hwss.disable_audio_stream(pipe_ctx); in dce110_disable_stream()
1283 link->dc->hwss.set_abm_immediate_disable(pipe_ctx);
1753 dc->hwss.disable_plane(dc,
1876 dc->hwss.edp_power_control(edp_link_with_sink, false);
2195 dc->hwss.disable_plane(dc, pipe_ctx_old);
2884 dc->hwss.update_plane_addr(dc, pipe_ctx);
3127 dc->hwss = dce110_funcs;
|
| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| A D | amdgpu_dm_debugfs.c | 2993 if (!dc->hwss.log_hw_state) in dtn_log_read()
2996 dc->hwss.log_hw_state(dc, &log_ctx); in dtn_log_read()
3031 if (dc->hwss.log_hw_state) in dtn_log_write()
3032 dc->hwss.log_hw_state(dc, NULL); in dtn_log_write()
3247 if (!dc->hwss.get_dcc_en_bits) { in dcc_en_bits_read()
3252 dc->hwss.get_dcc_en_bits(dc, dcc_en_bits); in dcc_en_bits_read()
|