Searched refs:idiv (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/clk/axs10x/ |
| A D | i2s_pll_clock.c | 29 unsigned int idiv; member
105 unsigned int idiv, fbdiv, odiv; in i2s_pll_recalc_rate() local
107 idiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_IDIV_REG)); in i2s_pll_recalc_rate()
111 return ((parent_rate / idiv) * fbdiv) / odiv; in i2s_pll_recalc_rate()
147 i2s_pll_write(clk, PLL_IDIV_REG, pll_cfg[i].idiv); in i2s_pll_set_rate()
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| A D | pll_clock.c | 72 u32 idiv; member
143 u32 idiv, fbdiv, odiv; in axs10x_pll_recalc_rate() local
146 idiv = axs10x_div_get_value(axs10x_pll_read(clk, PLL_REG_IDIV)); in axs10x_pll_recalc_rate()
151 do_div(rate, idiv * odiv); in axs10x_pll_recalc_rate()
187 axs10x_encode_div(pll_cfg[i].idiv, 0)); in axs10x_pll_set_rate()
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| /linux/drivers/net/dsa/sja1105/ |
| A D | sja1105_clocking.c | 46 u64 idiv; member
107 sja1105_packing(buf, &idiv->clksrc, 28, 24, size, op); in sja1105_cgu_idiv_packing()
108 sja1105_packing(buf, &idiv->autoblock, 11, 11, size, op); in sja1105_cgu_idiv_packing()
109 sja1105_packing(buf, &idiv->idiv, 5, 2, size, op); in sja1105_cgu_idiv_packing()
110 sja1105_packing(buf, &idiv->pd, 0, 0, size, op); in sja1105_cgu_idiv_packing()
118 struct sja1105_cgu_idiv idiv; in sja1105_cgu_idiv_config() local
130 idiv.clksrc = 0x0A; /* 25MHz */ in sja1105_cgu_idiv_config()
131 idiv.autoblock = 1; /* Block clk automatically */ in sja1105_cgu_idiv_config()
132 idiv.idiv = factor - 1; /* Divide by 1 or 10 */ in sja1105_cgu_idiv_config()
133 idiv.pd = enabled ? 0 : 1; /* Power down? */ in sja1105_cgu_idiv_config()
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| /linux/drivers/clk/ |
| A D | clk-hsdk-pll.c | 52 u32 idiv; member
145 val |= cfg->idiv << CGU_PLL_CTRL_IDIV_SHIFT; in hsdk_pll_set_cfg()
176 u32 idiv, fbdiv, odiv; in hsdk_pll_recalc_rate() local
192 idiv = 1 + ((val & CGU_PLL_CTRL_IDIV_MASK) >> CGU_PLL_CTRL_IDIV_SHIFT); in hsdk_pll_recalc_rate()
199 do_div(rate, idiv * odiv); in hsdk_pll_recalc_rate()
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| A D | clk-versaclock5.c | 356 unsigned long idiv; in vc5_pfd_round_rate() local
366 idiv = DIV_ROUND_UP(*parent_rate, rate); in vc5_pfd_round_rate()
367 if (idiv > 127) in vc5_pfd_round_rate()
370 return *parent_rate / idiv; in vc5_pfd_round_rate()
378 unsigned long idiv; in vc5_pfd_set_rate() local
390 idiv = DIV_ROUND_UP(parent_rate, rate); in vc5_pfd_set_rate()
393 if (idiv == 2) in vc5_pfd_set_rate()
396 div = VC5_REF_DIVIDER_REF_DIV(idiv); in vc5_pfd_set_rate()
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| A D | clk-si5351.c | 271 unsigned char idiv; in si5351_clkin_recalc_rate() local
275 idiv = SI5351_CLKIN_DIV_8; in si5351_clkin_recalc_rate()
278 idiv = SI5351_CLKIN_DIV_4; in si5351_clkin_recalc_rate()
281 idiv = SI5351_CLKIN_DIV_2; in si5351_clkin_recalc_rate()
284 idiv = SI5351_CLKIN_DIV_1; in si5351_clkin_recalc_rate()
288 SI5351_CLKIN_DIV_MASK, idiv); in si5351_clkin_recalc_rate()
291 __func__, (1 << (idiv >> 6)), rate); in si5351_clkin_recalc_rate()
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| /linux/drivers/clk/microchip/ |
| A D | clk-core.c | 585 u32 idiv; /* PLL iclk divider, treated fixed */ member
608 parent_rate /= pll->idiv; in spll_calc_mult_div()
660 pll_in_rate = parent_rate / pll->idiv; in spll_clk_recalc_rate()
749 spll->idiv = (readl(spll->ctrl_reg) >> PLL_IDIV_SHIFT) & PLL_IDIV_MASK; in pic32_spll_clk_register()
750 spll->idiv += 1; in pic32_spll_clk_register()
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| /linux/drivers/scsi/ |
| A D | ncr53c8xx.c | 5361 u_char idiv; in ncr_setsync() local
5376 idiv = ((scntl3 >> 4) & 0x7); in ncr_setsync()
5377 if ((sxfer & 0x1f) && idiv) in ncr_setsync()
5378 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz; in ncr_setsync()
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| /linux/arch/arm/ |
| A D | Kconfig | 1397 bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
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| /linux/arch/x86/kvm/ |
| A D | emulate.c | 1006 FASTOP1SRC2EX(idiv, idiv_ex);
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