Searched refs:ih2 (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/net/ethernet/cavium/liquidio/ |
| A D | octeon_nic.h | 123 struct octeon_instr_ih2 *ih2; in octnet_prepare_pci_cmd_o2() local
130 ih2 = (struct octeon_instr_ih2 *)&cmd->cmd2.ih2; in octnet_prepare_pci_cmd_o2()
135 ih2->fsz = LIO_PCICMD_O2; in octnet_prepare_pci_cmd_o2()
137 ih2->tagtype = ORDERED_TAG; in octnet_prepare_pci_cmd_o2()
138 ih2->grp = DEFAULT_POW_GRP; in octnet_prepare_pci_cmd_o2()
143 ih2->tag = tag; in octnet_prepare_pci_cmd_o2()
145 ih2->tag = LIO_DATA(port); in octnet_prepare_pci_cmd_o2()
147 ih2->raw = 1; in octnet_prepare_pci_cmd_o2()
151 ih2->dlengsz = setup->s.u.datasize; in octnet_prepare_pci_cmd_o2()
153 ih2->gather = 1; in octnet_prepare_pci_cmd_o2()
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| A D | request_manager.c | 589 struct octeon_instr_ih2 *ih2; in octeon_prepare_soft_command() local
650 ih2 = (struct octeon_instr_ih2 *)&sc->cmd.cmd2.ih2; in octeon_prepare_soft_command()
651 ih2->tagtype = ATOMIC_TAG; in octeon_prepare_soft_command()
652 ih2->tag = LIO_CONTROL; in octeon_prepare_soft_command()
653 ih2->raw = 1; in octeon_prepare_soft_command()
658 ih2->rs = 1; in octeon_prepare_soft_command()
681 ih2->fsz = LIO_PCICMD_O2; in octeon_prepare_soft_command()
690 struct octeon_instr_ih2 *ih2; in octeon_send_soft_command() local
718 ih2 = (struct octeon_instr_ih2 *)&sc->cmd.cmd2.ih2; in octeon_send_soft_command()
719 if (ih2->dlengsz) { in octeon_send_soft_command()
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| A D | octeon_nic.c | 36 struct octeon_instr_ih2 *ih2; in octeon_alloc_soft_command_resp() local
59 ih2 = (struct octeon_instr_ih2 *)&sc->cmd.cmd2.ih2; in octeon_alloc_soft_command_resp()
63 ih2->fsz = LIO_SOFTCMDRESP_IH2; in octeon_alloc_soft_command_resp()
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| A D | octeon_iq.h | 212 u64 ih2; member
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| A D | lio_main.c | 2269 (&sc->cmd.cmd2.ih2))->dlengsz; in send_nic_timestamp_pkt()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | vega10_ih.c | 75 if (adev->irq.ih2.ring_size) { in vega10_ih_init_register_offset()
76 ih_regs = &adev->irq.ih2.ih_regs; in vega10_ih_init_register_offset()
143 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega10_ih_toggle_interrupts()
263 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega10_ih_irq_init()
494 r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true); in vega10_ih_sw_init()
498 adev->irq.ih2.use_doorbell = true; in vega10_ih_sw_init()
499 adev->irq.ih2.doorbell_index = (adev->doorbell_index.ih + 2) << 1; in vega10_ih_sw_init()
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| A D | vega20_ih.c | 78 if (adev->irq.ih2.ring_size) { in vega20_ih_init_register_offset()
79 ih_regs = &adev->irq.ih2.ih_regs; in vega20_ih_init_register_offset()
147 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega20_ih_toggle_interrupts()
299 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in vega20_ih_irq_init()
545 r = amdgpu_ih_ring_init(adev, &adev->irq.ih2, PAGE_SIZE, true); in vega20_ih_sw_init()
549 adev->irq.ih2.use_doorbell = true; in vega20_ih_sw_init()
550 adev->irq.ih2.doorbell_index = (adev->doorbell_index.ih + 2) << 1; in vega20_ih_sw_init()
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| A D | navi10_ih.c | 77 if (adev->irq.ih2.ring_size) { in navi10_ih_init_register_offset()
78 ih_regs = &adev->irq.ih2.ih_regs; in navi10_ih_init_register_offset()
198 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in navi10_ih_toggle_interrupts()
319 struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2}; in navi10_ih_irq_init()
571 adev->irq.ih2.ring_size = 0; in navi10_ih_sw_init()
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| A D | amdgpu_irq.h | 92 struct amdgpu_ih_ring ih, ih1, ih2, ih_soft; member
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| A D | amdgpu_irq.c | 241 amdgpu_ih_process(adev, &adev->irq.ih2); in amdgpu_irq_handle_ih2()
390 amdgpu_ih_ring_fini(adev, &adev->irq.ih2); in amdgpu_irq_fini_hw()
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