Searched refs:ih_rb_base_hi (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | vega10_ih.c | 54 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI); in vega10_ih_init_register_offset()
67 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI_RING1); in vega10_ih_init_register_offset()
78 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI_RING2); in vega10_ih_init_register_offset()
218 WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff); in vega10_ih_enable_ring()
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| A D | vega20_ih.c | 57 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI); in vega20_ih_init_register_offset()
70 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI_RING1); in vega20_ih_init_register_offset()
81 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI_RING2); in vega20_ih_init_register_offset()
222 WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff); in vega20_ih_enable_ring()
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| A D | navi10_ih.c | 56 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI); in navi10_ih_init_register_offset()
69 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI_RING1); in navi10_ih_init_register_offset()
80 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI_RING2); in navi10_ih_init_register_offset()
273 WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff); in navi10_ih_enable_ring()
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| A D | amdgpu_ih.h | 35 uint32_t ih_rb_base_hi; member
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