Searched refs:ih_rb_wptr (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | vega10_ih.c | 56 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); in vega10_ih_init_register_offset()
69 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING1); in vega10_ih_init_register_offset()
80 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING2); in vega10_ih_init_register_offset()
125 WREG32(ih_regs->ih_rb_wptr, 0); in vega10_ih_toggle_ring_interrupts()
242 WREG32(ih_regs->ih_rb_wptr, 0); in vega10_ih_enable_ring()
350 wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr); in vega10_ih_get_wptr()
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| A D | vega20_ih.c | 59 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); in vega20_ih_init_register_offset()
72 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING1); in vega20_ih_init_register_offset()
83 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING2); in vega20_ih_init_register_offset()
129 WREG32(ih_regs->ih_rb_wptr, 0); in vega20_ih_toggle_ring_interrupts()
246 WREG32(ih_regs->ih_rb_wptr, 0); in vega20_ih_enable_ring()
401 wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr); in vega20_ih_get_wptr()
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| A D | navi10_ih.c | 58 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); in navi10_ih_init_register_offset()
71 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING1); in navi10_ih_init_register_offset()
82 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING2); in navi10_ih_init_register_offset()
180 WREG32(ih_regs->ih_rb_wptr, 0); in navi10_ih_toggle_ring_interrupts()
298 WREG32(ih_regs->ih_rb_wptr, 0); in navi10_ih_enable_ring()
425 wptr = RREG32_NO_KIQ(ih_regs->ih_rb_wptr); in navi10_ih_get_wptr()
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| A D | amdgpu_ih.h | 37 uint32_t ih_rb_wptr; member
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