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/linux/drivers/irqchip/
A Dirq-pruss-intc.c122 struct pruss_intc *intc; member
484 struct pruss_intc *intc = host_irq_data->intc; in pruss_intc_irq_handler() local
532 intc = devm_kzalloc(dev, sizeof(*intc), GFP_KERNEL); in pruss_intc_probe()
533 if (!intc) in pruss_intc_probe()
537 intc->dev = dev; in pruss_intc_probe()
554 pruss_intc_init(intc); in pruss_intc_probe()
560 if (!intc->domain) in pruss_intc_probe()
573 intc->irqs[i] = irq; in pruss_intc_probe()
581 host_data->intc = intc; in pruss_intc_probe()
592 if (intc->irqs[i]) in pruss_intc_probe()
[all …]
A Dirq-bcm7038-l1.c209 was_disabled = !!(intc->cpus[intc->affinity[hw]]->mask_cache[word] & in bcm7038_l1_set_affinity()
280 intc); in bcm7038_l1_init_one()
311 val = intc->wake_mask[word] | intc->irq_fwd_mask[word]; in bcm7038_l1_suspend()
313 intc->cpus[boot_cpu]->map_base + reg_mask_set(intc, word)); in bcm7038_l1_suspend()
315 intc->cpus[boot_cpu]->map_base + reg_mask_clr(intc, word)); in bcm7038_l1_suspend()
336 intc->cpus[boot_cpu]->map_base + reg_mask_set(intc, word)); in bcm7038_l1_resume()
338 intc->cpus[boot_cpu]->map_base + reg_mask_clr(intc, word)); in bcm7038_l1_resume()
405 intc = kzalloc(sizeof(*intc), GFP_KERNEL); in bcm7038_l1_of_init()
406 if (!intc) in bcm7038_l1_of_init()
422 intc); in bcm7038_l1_of_init()
[all …]
A Dirq-bcm6345-l1.c126 cpu = intc->cpus[0]; in bcm6345_l1_irq_handle()
157 intc->cpus[cpu_idx]->map_base + reg_enable(intc, word)); in __bcm6345_l1_unmask()
169 intc->cpus[cpu_idx]->map_base + reg_enable(intc, word)); in __bcm6345_l1_mask()
246 if (!intc->n_words) in bcm6345_l1_init_one()
247 intc->n_words = n_words; in bcm6345_l1_init_one()
305 intc = kzalloc(sizeof(*intc), GFP_KERNEL); in bcm6345_l1_of_init()
306 if (!intc) in bcm6345_l1_of_init()
325 intc->domain = irq_domain_add_linear(dn, IRQS_PER_WORD * intc->n_words, in bcm6345_l1_of_init()
327 intc); in bcm6345_l1_of_init()
328 if (!intc->domain) { in bcm6345_l1_of_init()
[all …]
A Dirq-ingenic.c37 struct irq_domain *domain = intc->domain; in intc_cascade()
42 for (i = 0; i < intc->num_chips; i++) { in intc_cascade()
63 struct ingenic_intc_data *intc; in ingenic_intc_of_init() local
70 intc = kzalloc(sizeof(*intc), GFP_KERNEL); in ingenic_intc_of_init()
71 if (!intc) { in ingenic_intc_of_init()
86 intc->num_chips = num_chips; in ingenic_intc_of_init()
87 intc->base = of_iomap(node, 0); in ingenic_intc_of_init()
88 if (!intc->base) { in ingenic_intc_of_init()
100 intc->domain = domain; in ingenic_intc_of_init()
135 iounmap(intc->base); in ingenic_intc_of_init()
[all …]
A Dirq-bcm2836.c23 static struct bcm2836_arm_irqchip_intc intc __read_mostly;
29 void __iomem *reg = intc.base + reg_offset + 4 * cpu; in bcm2836_arm_irqchip_mask_per_cpu_irq()
38 void __iomem *reg = intc.base + reg_offset + 4 * cpu; in bcm2836_arm_irqchip_unmask_per_cpu_irq()
146 generic_handle_domain_irq(intc.domain, hwirq); in bcm2836_arm_irqchip_handle_irq()
175 intc.base + LOCAL_MAILBOX0_CLR0 + 16 * cpu); in bcm2836_arm_irqchip_ipi_ack()
250 .fwnode = intc.domain->fwnode, in bcm2836_arm_irqchip_smp_init()
309 writel(0, intc.base + LOCAL_CONTROL); in bcm2835_init_local_timer_frequency()
315 writel(0x80000000, intc.base + LOCAL_PRESCALER); in bcm2835_init_local_timer_frequency()
321 intc.base = of_iomap(node, 0); in bcm2836_arm_irqchip_l1_intc_of_init()
322 if (!intc.base) { in bcm2836_arm_irqchip_l1_intc_of_init()
[all …]
A Dirq-bcm2835.c87 static struct armctrl_ic intc __read_mostly;
147 if (!intc.domain) in armctrl_of_init()
151 intc.pending[b] = base + reg_pending[b]; in armctrl_of_init()
152 intc.enable[b] = base + reg_enable[b]; in armctrl_of_init()
153 intc.disable[b] = base + reg_disable[b]; in armctrl_of_init()
156 irq = irq_create_mapping(intc.domain, MAKE_HWIRQ(b, i)); in armctrl_of_init()
163 reg = readl_relaxed(intc.enable[b]); in armctrl_of_init()
165 writel_relaxed(reg, intc.disable[b]); in armctrl_of_init()
213 u32 stat = readl_relaxed(intc.pending[bank]); in armctrl_translate_bank()
249 generic_handle_domain_irq(intc.domain, hwirq); in bcm2835_handle_irq()
[all …]
/linux/arch/arm/mach-s3c/
A Dirq-s3c24xx.c83 struct s3c_irq_intc *intc = irq_data->intc; in s3c_irq_mask() local
111 struct s3c_irq_intc *intc = irq_data->intc; in s3c_irq_unmask() local
130 struct s3c_irq_intc *intc = irq_data->intc; in s3c_irq_ack() local
299 struct s3c_irq_intc *intc = irq_data->intc; in s3c_irq_demux() local
439 irq_data->intc = intc; in s3c24xx_irq_map()
520 reg_source = intc->reg_intpnd ? intc->reg_intpnd : intc->reg_pending; in s3c24xx_clear_intc()
550 if (!intc) in s3c24xx_init_intc()
614 return intc; in s3c24xx_init_intc()
617 kfree(intc); in s3c24xx_init_intc()
1171 irq_data->intc = intc; in s3c24xx_irq_map_of()
[all …]
/linux/arch/arm/boot/dts/
A Darm-realview-pba8.dts45 interrupt-parent = <&intc>;
62 interrupt-parent = <&intc>;
67 interrupt-parent = <&intc>;
80 interrupt-parent = <&intc>;
85 interrupt-parent = <&intc>;
90 interrupt-parent = <&intc>;
95 interrupt-parent = <&intc>;
100 interrupt-parent = <&intc>;
105 interrupt-parent = <&intc>;
110 interrupt-parent = <&intc>;
[all …]
A Darm-realview-pbx-a9.dts89 interrupt-parent = <&intc>;
120 interrupt-parent = <&intc>;
125 interrupt-parent = <&intc>;
130 interrupt-parent = <&intc>;
135 interrupt-parent = <&intc>;
140 interrupt-parent = <&intc>;
145 interrupt-parent = <&intc>;
150 interrupt-parent = <&intc>;
155 interrupt-parent = <&intc>;
160 interrupt-parent = <&intc>;
[all …]
A Darm-realview-eb.dts68 interrupt-parent = <&intc>;
73 interrupt-parent = <&intc>;
78 interrupt-parent = <&intc>;
83 interrupt-parent = <&intc>;
89 interrupt-parent = <&intc>;
94 interrupt-parent = <&intc>;
99 interrupt-parent = <&intc>;
104 interrupt-parent = <&intc>;
109 interrupt-parent = <&intc>;
114 interrupt-parent = <&intc>;
[all …]
A Darm-realview-eb-mp.dtsi123 interrupt-parent = <&intc>;
128 interrupt-parent = <&intc>;
133 interrupt-parent = <&intc>;
138 interrupt-parent = <&intc>;
144 interrupt-parent = <&intc>;
149 interrupt-parent = <&intc>;
154 interrupt-parent = <&intc>;
159 interrupt-parent = <&intc>;
164 interrupt-parent = <&intc>;
169 interrupt-parent = <&intc>;
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
A Dingenic,intc.yaml19 - ingenic,jz4740-intc
20 - ingenic,jz4760-intc
21 - ingenic,jz4780-intc
24 - ingenic,jz4775-intc
25 - ingenic,jz4770-intc
26 - ingenic,jz4760b-intc
27 - const: ingenic,jz4760-intc
29 - const: ingenic,x1000-intc
30 - const: ingenic,jz4780-intc
33 - const: ingenic,jz4740-intc
[all …]
A Dmrvl,intc.yaml24 - mrvl,intc-nr-irqs
30 - mrvl,mmp-intc
31 - mrvl,mmp2-intc
41 - marvell,mmp3-intc
42 - mrvl,mmp2-mux-intc
72 - mrvl,mmp-intc
73 - mrvl,mmp2-intc
74 - marvell,mmp3-intc
75 - marvell,orion-intc
76 - mrvl,mmp2-mux-intc
[all …]
A Dcsky,apb-intc.txt9 - csky,dual-apb-intc consists of 2 apb-intc and 128 irq nums supported.
13 intc node bindings definition
23 Definition: must be "csky,apb-intc"
24 "csky,dual-apb-intc"
25 "csky,gx6605s-intc"
43 intc: interrupt-controller@500000 {
44 compatible = "csky,apb-intc";
50 intc: interrupt-controller@500000 {
51 compatible = "csky,dual-apb-intc";
57 intc: interrupt-controller@500000 {
[all …]
A Dti,omap-intc-irq.txt1 Omap2/3 intc controller
3 On TI omap2 and 3 the intc interrupt controller can provide
8 "ti,omap2-intc"
9 "ti,omap3-intc"
10 "ti,dm814-intc"
11 "ti,dm816-intc"
12 "ti,am33xx-intc"
16 source, should be 1 for intc
23 intc: interrupt-controller@48200000 {
24 compatible = "ti,omap3-intc";
A Drenesas,irqc.yaml27 - renesas,intc-ex-r8a774a1 # RZ/G2M
28 - renesas,intc-ex-r8a774b1 # RZ/G2N
29 - renesas,intc-ex-r8a774c0 # RZ/G2E
30 - renesas,intc-ex-r8a774e1 # RZ/G2H
31 - renesas,intc-ex-r8a7795 # R-Car H3
32 - renesas,intc-ex-r8a7796 # R-Car M3-W
34 - renesas,intc-ex-r8a77965 # R-Car M3-N
35 - renesas,intc-ex-r8a77970 # R-Car V3M
36 - renesas,intc-ex-r8a77980 # R-Car V3H
37 - renesas,intc-ex-r8a77990 # R-Car E3
[all …]
A Damlogic,meson-gpio-intc.txt12 - compatible : must have "amlogic,meson8-gpio-intc" and either
13 "amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or
14 "amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or
15 "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or
16 "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912)
17 "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X)
18 "amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2)
19 "amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3)
20 "amlogic,meson-a1-gpio-intc" for A1 SoCs (A113L)
31 compatible = "amlogic,meson-gxbb-gpio-intc",
[all …]
A Dallwinner,sun6i-a31-r-intc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml#
26 - const: allwinner,sun6i-a31-r-intc
29 - allwinner,sun8i-a83t-r-intc
30 - allwinner,sun8i-h3-r-intc
31 - allwinner,sun50i-a64-r-intc
32 - const: allwinner,sun6i-a31-r-intc
33 - const: allwinner,sun50i-h6-r-intc
59 compatible = "allwinner,sun50i-a64-r-intc",
60 "allwinner,sun6i-a31-r-intc";
/linux/arch/m68k/coldfire/
A DMakefile19 obj-$(CONFIG_M5206) += m5206.o intc.o reset.o
20 obj-$(CONFIG_M5206e) += m5206.o intc.o reset.o
21 obj-$(CONFIG_M520x) += m520x.o intc-simr.o reset.o
23 obj-$(CONFIG_M5249) += m5249.o intc.o intc-5249.o reset.o
24 obj-$(CONFIG_M525x) += m525x.o intc.o intc-525x.o reset.o
25 obj-$(CONFIG_M527x) += m527x.o intc-2.o reset.o
26 obj-$(CONFIG_M5272) += m5272.o intc-5272.o
27 obj-$(CONFIG_M528x) += m528x.o intc-2.o reset.o
28 obj-$(CONFIG_M5307) += m5307.o intc.o reset.o
30 obj-$(CONFIG_M5407) += m5407.o intc.o reset.o
[all …]
/linux/arch/mips/boot/dts/ingenic/
A Djz4770.dtsi92 interrupt-parent = <&intc>;
133 interrupt-parent = <&intc>;
155 interrupt-parent = <&intc>;
170 interrupt-parent = <&intc>;
185 interrupt-parent = <&intc>;
200 interrupt-parent = <&intc>;
245 interrupt-parent = <&intc>;
269 interrupt-parent = <&intc>;
289 interrupt-parent = <&intc>;
309 interrupt-parent = <&intc>;
[all …]
A Dx1000.dtsi33 compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
120 interrupt-parent = <&intc>;
136 interrupt-parent = <&intc>;
160 interrupt-parent = <&intc>;
214 interrupt-parent = <&intc>;
227 interrupt-parent = <&intc>;
240 interrupt-parent = <&intc>;
255 interrupt-parent = <&intc>;
269 interrupt-parent = <&intc>;
283 interrupt-parent = <&intc>;
[all …]
A Djz4780.dtsi113 interrupt-parent = <&intc>;
153 interrupt-parent = <&intc>;
178 interrupt-parent = <&intc>;
193 interrupt-parent = <&intc>;
264 interrupt-parent = <&intc>;
281 interrupt-parent = <&intc>;
294 interrupt-parent = <&intc>;
307 interrupt-parent = <&intc>;
320 interrupt-parent = <&intc>;
333 interrupt-parent = <&intc>;
[all …]
A Dx1830.dtsi33 compatible = "ingenic,x1830-intc", "ingenic,jz4780-intc";
113 interrupt-parent = <&intc>;
129 interrupt-parent = <&intc>;
153 interrupt-parent = <&intc>;
168 interrupt-parent = <&intc>;
207 interrupt-parent = <&intc>;
220 interrupt-parent = <&intc>;
235 interrupt-parent = <&intc>;
249 interrupt-parent = <&intc>;
263 interrupt-parent = <&intc>;
[all …]
A Djz4740.dtsi81 interrupt-parent = <&intc>;
111 interrupt-parent = <&intc>;
136 interrupt-parent = <&intc>;
151 interrupt-parent = <&intc>;
166 interrupt-parent = <&intc>;
192 interrupt-parent = <&intc>;
222 interrupt-parent = <&intc>;
237 interrupt-parent = <&intc>;
248 interrupt-parent = <&intc>;
263 interrupt-parent = <&intc>;
[all …]
A Djz4725b.dtsi32 compatible = "ingenic,jz4725b-intc", "ingenic,jz4740-intc";
81 interrupt-parent = <&intc>;
120 interrupt-parent = <&intc>;
145 interrupt-parent = <&intc>;
160 interrupt-parent = <&intc>;
175 interrupt-parent = <&intc>;
207 interrupt-parent = <&intc>;
231 interrupt-parent = <&intc>;
249 interrupt-parent = <&intc>;
264 interrupt-parent = <&intc>;
[all …]

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