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Searched refs:intel_de_posting_read (Results 1 – 25 of 27) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
A Dintel_fdi.c356 intel_de_posting_read(dev_priv, reg); in intel_fdi_normal_train()
410 intel_de_posting_read(dev_priv, reg); in ilk_fdi_link_train()
446 intel_de_posting_read(dev_priv, reg); in ilk_fdi_link_train()
500 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
529 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
584 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
646 intel_de_posting_read(dev_priv, reg); in ivb_manual_fdi_link_train()
906 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_enable()
913 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_enable()
945 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_disable()
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A Dg4x_hdmi.c56 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in intel_hdmi_prepare()
175 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in g4x_enable_hdmi()
202 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in ibx_enable_hdmi()
204 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in ibx_enable_hdmi()
217 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in ibx_enable_hdmi()
224 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in ibx_enable_hdmi()
226 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in ibx_enable_hdmi()
270 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in cpt_enable_hdmi()
277 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in cpt_enable_hdmi()
311 intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg); in intel_disable_hdmi()
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A Dg4x_dp.c229 intel_de_posting_read(dev_priv, DP_A); in ilk_edp_pll_on()
244 intel_de_posting_read(dev_priv, DP_A); in ilk_edp_pll_on()
263 intel_de_posting_read(dev_priv, DP_A); in ilk_edp_pll_off()
446 intel_de_posting_read(dev_priv, intel_dp->output_reg); in intel_dp_link_down()
450 intel_de_posting_read(dev_priv, intel_dp->output_reg); in intel_dp_link_down()
470 intel_de_posting_read(dev_priv, intel_dp->output_reg); in intel_dp_link_down()
474 intel_de_posting_read(dev_priv, intel_dp->output_reg); in intel_dp_link_down()
601 intel_de_posting_read(dev_priv, intel_dp->output_reg); in cpt_set_link_train()
629 intel_de_posting_read(dev_priv, intel_dp->output_reg); in g4x_set_link_train()
653 intel_de_posting_read(dev_priv, intel_dp->output_reg); in intel_dp_enable_port()
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A Dintel_pps.c107 intel_de_posting_read(dev_priv, intel_dp->output_reg); in vlv_power_sequencer_kick()
110 intel_de_posting_read(dev_priv, intel_dp->output_reg); in vlv_power_sequencer_kick()
610 intel_de_posting_read(dev_priv, pp_ctrl_reg); in intel_pps_vdd_on_unlocked()
676 intel_de_posting_read(dev_priv, pp_ctrl_reg); in intel_pps_vdd_off_sync_unlocked()
788 intel_de_posting_read(dev_priv, pp_ctrl_reg); in intel_pps_on_unlocked()
796 intel_de_posting_read(dev_priv, pp_ctrl_reg); in intel_pps_on_unlocked()
804 intel_de_posting_read(dev_priv, pp_ctrl_reg); in intel_pps_on_unlocked()
849 intel_de_posting_read(dev_priv, pp_ctrl_reg); in intel_pps_off_unlocked()
893 intel_de_posting_read(dev_priv, pp_ctrl_reg); in intel_pps_backlight_on()
914 intel_de_posting_read(dev_priv, pp_ctrl_reg); in intel_pps_backlight_off()
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A Dintel_fifo_underrun.c104 intel_de_posting_read(dev_priv, reg); in i9xx_check_fifo_underruns()
124 intel_de_posting_read(dev_priv, reg); in i9xx_set_fifo_underrun_reporting()
157 intel_de_posting_read(dev_priv, GEN7_ERR_INT); in ivb_check_fifo_underruns()
245 intel_de_posting_read(dev_priv, SERR_INT); in cpt_check_pch_fifo_underruns()
A Dintel_hdmi.c302 intel_de_posting_read(dev_priv, reg); in ibx_write_infoframe()
384 intel_de_posting_read(dev_priv, reg); in cpt_write_infoframe()
460 intel_de_posting_read(dev_priv, reg); in vlv_write_infoframe()
890 intel_de_posting_read(dev_priv, reg); in g4x_set_infoframes()
910 intel_de_posting_read(dev_priv, reg); in g4x_set_infoframes()
1062 intel_de_posting_read(dev_priv, reg); in ibx_set_infoframes()
1083 intel_de_posting_read(dev_priv, reg); in ibx_set_infoframes()
1119 intel_de_posting_read(dev_priv, reg); in cpt_set_infoframes()
1132 intel_de_posting_read(dev_priv, reg); in cpt_set_infoframes()
1190 intel_de_posting_read(dev_priv, reg); in vlv_set_infoframes()
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A Dintel_pipe_crc.c620 intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe)); in intel_crtc_set_crc_source()
655 intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe)); in intel_crtc_enable_pipe_crc()
670 intel_de_posting_read(dev_priv, PIPE_CRC_CTL(pipe)); in intel_crtc_disable_pipe_crc()
A Dintel_dsb.c58 intel_de_posting_read(i915, DSB_CTRL(pipe, id)); in intel_dsb_enable_engine()
76 intel_de_posting_read(i915, DSB_CTRL(pipe, id)); in intel_dsb_disable_engine()
A Dintel_dpll_mgr.c454 intel_de_posting_read(dev_priv, PCH_DPLL(id)); in ibx_pch_dpll_enable()
463 intel_de_posting_read(dev_priv, PCH_DPLL(id)); in ibx_pch_dpll_enable()
473 intel_de_posting_read(dev_priv, PCH_DPLL(id)); in ibx_pch_dpll_disable()
552 intel_de_posting_read(dev_priv, WRPLL_CTL(id)); in hsw_ddi_wrpll_enable()
560 intel_de_posting_read(dev_priv, SPLL_CTL); in hsw_ddi_spll_enable()
572 intel_de_posting_read(dev_priv, WRPLL_CTL(id)); in hsw_ddi_wrpll_disable()
590 intel_de_posting_read(dev_priv, SPLL_CTL); in hsw_ddi_spll_disable()
1172 intel_de_posting_read(dev_priv, DPLL_CTRL1); in skl_ddi_pll_write_ctrl1()
1185 intel_de_posting_read(dev_priv, regs[id].cfgcr1); in skl_ddi_pll_enable()
1211 intel_de_posting_read(dev_priv, regs[id].ctl); in skl_ddi_pll_disable()
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A Dintel_de.h21 intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_posting_read() function
A Dintel_dpll.c1458 intel_de_posting_read(dev_priv, DPLL(pipe)); in i9xx_enable_pll()
1476 intel_de_posting_read(dev_priv, DPLL(pipe)); in i9xx_enable_pll()
1607 intel_de_posting_read(dev_priv, DPLL(pipe)); in _vlv_enable_pll()
1637 intel_de_posting_read(dev_priv, DPLL_MD(pipe)); in vlv_enable_pll()
1809 intel_de_posting_read(dev_priv, DPLL_MD(pipe)); in chv_enable_pll()
1864 intel_de_posting_read(dev_priv, DPLL(pipe)); in vlv_disable_pll()
1881 intel_de_posting_read(dev_priv, DPLL(pipe)); in chv_disable_pll()
1907 intel_de_posting_read(dev_priv, DPLL(pipe)); in i9xx_disable_pll()
A Dintel_vga.c44 intel_de_posting_read(dev_priv, vga_reg); in intel_vga_disable()
A Dintel_backlight.c514 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); in lpt_enable_backlight()
550 intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2); in pch_enable_backlight()
564 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); in pch_enable_backlight()
594 intel_de_posting_read(dev_priv, BLC_PWM_CTL); in i9xx_enable_backlight()
637 intel_de_posting_read(dev_priv, BLC_PWM_CTL2); in i965_enable_backlight()
669 intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); in vlv_enable_backlight()
722 intel_de_posting_read(dev_priv, in bxt_enable_backlight()
758 intel_de_posting_read(dev_priv, in cnp_enable_backlight()
A Dintel_lvds.c323 intel_de_posting_read(dev_priv, lvds_encoder->reg); in intel_enable_lvds()
348 intel_de_posting_read(dev_priv, lvds_encoder->reg); in intel_disable_lvds()
A Dicl_dsi.c368 intel_de_posting_read(dev_priv, ICL_DSI_ESC_CLK_DIV(port)); in gen11_dsi_program_esc_clk_div()
374 intel_de_posting_read(dev_priv, ICL_DPHY_ESC_CLK_DIV(port)); in gen11_dsi_program_esc_clk_div()
381 intel_de_posting_read(dev_priv, ADL_MIPIO_DW(port, 8)); in gen11_dsi_program_esc_clk_div()
703 intel_de_posting_read(dev_priv, ICL_DPCLKA_CFGCR0); in gen11_dsi_map_pll()
A Dintel_crt.c485 intel_de_posting_read(dev_priv, crt->adpa_reg); in ilk_crt_detect_hotplug()
962 intel_de_posting_read(dev_priv, crt->adpa_reg); in intel_crt_reset()
A Dvlv_dsi_pll.c520 intel_de_posting_read(dev_priv, BXT_DSI_PLL_CTL); in bxt_dsi_pll_enable()
A Dintel_ddi.c1404 intel_de_posting_read(dev_priv, DDI_BUF_CTL(port)); in hsw_set_signal_levels()
2193 intel_de_posting_read(dev_priv, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_disable_fec_state()
3030 intel_de_posting_read(dev_priv, reg); in intel_enable_ddi_hdmi()
3264 intel_de_posting_read(dev_priv, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_prepare_link_retrain()
3279 intel_de_posting_read(dev_priv, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_prepare_link_retrain()
3283 intel_de_posting_read(dev_priv, DDI_BUF_CTL(port)); in intel_ddi_prepare_link_retrain()
A Dintel_display.c771 intel_de_posting_read(dev_priv, reg); in intel_enable_transcoder()
1783 intel_de_posting_read(dev_priv, IPS_CTL); in hsw_disable_ips()
4428 intel_de_posting_read(dev_priv, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
4445 intel_de_posting_read(dev_priv, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
4456 intel_de_posting_read(dev_priv, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
4771 intel_de_posting_read(dev_priv, PIPECONF(pipe)); in ilk_set_pipeconf()
11158 intel_de_posting_read(dev_priv, DPLL(pipe)); in i830_enable_pipe()
11171 intel_de_posting_read(dev_priv, DPLL(pipe)); in i830_enable_pipe()
11177 intel_de_posting_read(dev_priv, PIPECONF(pipe)); in i830_enable_pipe()
11204 intel_de_posting_read(dev_priv, PIPECONF(pipe)); in i830_disable_pipe()
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A Dintel_dmc.c261 intel_de_posting_read(dev_priv, DC_STATE_DEBUG); in gen9_set_dc_state_debugmask()
A Dintel_sdvo.c224 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg); in intel_sdvo_write_sdvox()
231 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg); in intel_sdvo_write_sdvox()
248 intel_de_posting_read(dev_priv, GEN3_SDVOB); in intel_sdvo_write_sdvox()
251 intel_de_posting_read(dev_priv, GEN3_SDVOC); in intel_sdvo_write_sdvox()
A Dintel_tv.c1619 intel_de_posting_read(dev_priv, TV_DAC); in intel_tv_detect_type()
1651 intel_de_posting_read(dev_priv, TV_CTL); in intel_tv_detect_type()
A Dintel_cdclk.c1012 intel_de_posting_read(dev_priv, DPLL_CTRL1); in skl_dpll0_enable()
1108 intel_de_posting_read(dev_priv, CDCLK_CTL); in skl_set_cdclk()
1123 intel_de_posting_read(dev_priv, CDCLK_CTL); in skl_set_cdclk()
A Dvlv_dsi.c693 intel_de_posting_read(dev_priv, port_ctrl); in intel_dsi_port_enable()
712 intel_de_posting_read(dev_priv, port_ctrl); in intel_dsi_port_disable()
A Dintel_display_power.c5201 intel_de_posting_read(dev_priv, reg); in gen9_dbuf_slice_set()
5378 intel_de_posting_read(dev_priv, D_COMP_BDW); in hsw_write_dcomp()
5412 intel_de_posting_read(dev_priv, LCPLL_CTL); in hsw_disable_lcpll()
5430 intel_de_posting_read(dev_priv, LCPLL_CTL); in hsw_disable_lcpll()
5457 intel_de_posting_read(dev_priv, LCPLL_CTL); in hsw_restore_lcpll()

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