| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_psr.c | 568 intel_de_rmw(dev_priv, CHICKEN_PAR1_1, in hsw_activate_psr2()
1086 intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), 0, in intel_psr_enable_source()
1123 intel_de_rmw(dev_priv, CHICKEN_PAR1_1, IGNORE_PSR2_HW_TRACKING, in intel_psr_enable_source()
1130 intel_de_rmw(dev_priv, in intel_psr_enable_source()
1137 intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, 0, in intel_psr_enable_source()
1288 intel_de_rmw(dev_priv, CHICKEN_PAR1_1, in intel_psr_disable_locked()
1294 intel_de_rmw(dev_priv, in intel_psr_disable_locked()
1300 intel_de_rmw(dev_priv, CLKGATE_DIS_MISC, in intel_psr_disable_locked()
1408 intel_de_rmw(dev_priv, in psr_force_hw_tracking_exit()
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| A D | intel_de.h | 33 intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) in intel_de_rmw() function
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| A D | intel_cdclk.c | 801 intel_de_rmw(dev_priv, LCPLL_CTL, in bdw_set_cdclk()
812 intel_de_rmw(dev_priv, LCPLL_CTL, in bdw_set_cdclk()
815 intel_de_rmw(dev_priv, LCPLL_CTL, in bdw_set_cdclk()
1006 intel_de_rmw(dev_priv, DPLL_CTRL1, in skl_dpll0_enable()
1014 intel_de_rmw(dev_priv, LCPLL1_CTL, in skl_dpll0_enable()
1028 intel_de_rmw(dev_priv, LCPLL1_CTL, in skl_dpll0_disable()
1520 intel_de_rmw(dev_priv, BXT_DE_PLL_CTL, in bxt_de_pll_enable()
1535 intel_de_rmw(dev_priv, BXT_DE_PLL_ENABLE, in icl_cdclk_pll_disable()
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| A D | intel_dp_mst.c | 414 intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), in intel_mst_post_disable_dp()
566 intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(trans), 0, in intel_mst_enable_dp()
577 intel_de_rmw(dev_priv, CHICKEN_TRANS(trans), 0, in intel_mst_enable_dp()
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| A D | intel_ddi.c | 1057 intel_de_rmw(dev_priv, ICL_PORT_CL_DW10(phy), val, in icl_ddi_combo_vswing_program()
1412 intel_de_rmw(i915, reg, clk_sel_mask, clk_sel); in _icl_ddi_enable_clock()
1418 intel_de_rmw(i915, reg, clk_off, 0); in _icl_ddi_enable_clock()
1428 intel_de_rmw(i915, reg, 0, clk_off); in _icl_ddi_disable_clock()
1707 intel_de_rmw(i915, ICL_DPCLKA_CFGCR0, in icl_ddi_tc_enable_clock()
1721 intel_de_rmw(i915, ICL_DPCLKA_CFGCR0, in icl_ddi_tc_disable_clock()
1811 intel_de_rmw(i915, DPLL_CTRL2, in skl_ddi_enable_clock()
1827 intel_de_rmw(i915, DPLL_CTRL2, in skl_ddi_disable_clock()
2279 intel_de_rmw(i915, ICL_PIPE_DSS_CTL1(pipe), in intel_ddi_mso_configure()
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| A D | intel_display_power.c | 5199 intel_de_rmw(dev_priv, reg, DBUF_POWER_REQUEST, in gen9_dbuf_slice_set()
5267 intel_de_rmw(dev_priv, DBUF_CTL_S(slice), in gen12_dbuf_slices_config()
5298 intel_de_rmw(dev_priv, MBUS_ABOX_CTL(i), mask, val); in icl_mbus_init()
5768 intel_de_rmw(dev_priv, BW_BUDDY_CTL(i), in tgl_bw_buddy_init()
5787 intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, 0, in icl_display_core_init()
6339 intel_de_rmw(i915, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS); in intel_display_power_suspend_late()
6354 intel_de_rmw(i915, SOUTH_CHICKEN1, SBCLK_RUN_REFCLK_DIS, 0); in intel_display_power_resume_early()
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| A D | intel_dmc.c | 259 intel_de_rmw(dev_priv, DC_STATE_DEBUG, 0, in gen9_set_dc_state_debugmask()
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| A D | icl_dsi.c | 1248 intel_de_rmw(dev_priv, CHICKEN_PAR1_1, in icl_apply_kvmr_pipe_a_wa()
1267 intel_de_rmw(i915, TGL_DSI_CHKN_REG(port), in adlp_set_lp_hs_wakeup_gb()
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| A D | intel_display.c | 321 intel_de_rmw(dev_priv, CLKGATE_DIS_PSL(pipe), CURSOR_GATING_DIS, in icl_wa_cursorclkgating()
759 intel_de_rmw(dev_priv, PIPE_ARB_CTL(pipe), in intel_enable_transcoder()
818 intel_de_rmw(dev_priv, CHICKEN_TRANS(cpu_transcoder), in intel_disable_transcoder()
1907 intel_de_rmw(i915, CHICKEN_PIPESL_1(pipe), in intel_async_flip_vtd_wa()
1912 intel_de_rmw(i915, CHICKEN_PIPESL_1(pipe), in intel_async_flip_vtd_wa()
4855 intel_de_rmw(dev_priv, PIPE_MISC2(crtc->pipe), in bdw_set_pipemisc()
11773 intel_de_rmw(dev_priv, CHICKEN_PAR1_1, in intel_early_display_was()
11775 intel_de_rmw(dev_priv, CHICKEN_MISC_2, in intel_early_display_was()
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| A D | intel_fbc.c | 381 intel_de_rmw(dev_priv, CHICKEN_MISC_4, in gen7_fbc_activate()
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| /linux/drivers/gpu/drm/i915/ |
| A D | intel_pm.c | 7468 intel_de_rmw(dev_priv, GEN9_CLKGATE_DIS_5, 0, DPCE_GATING_DIS); in adlp_init_clock_gating()
8174 intel_de_rmw(dev_priv, MBUS_CTL, in update_mbus_pre_enable()
8179 intel_de_rmw(dev_priv, DBUF_CTL_S(slice), in update_mbus_pre_enable()
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