ixLCAC_MC0_CNTL (reference) in projects: linux

Searched refs:ixLCAC_MC0_CNTL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
A D	smu_6_0_d.h	`26 #define ixLCAC_MC0_CNTL 0x011C macro`
A D	smu_8_0_d.h	`632 #define ixLCAC_MC0_CNTL 0xd0208130 macro`
A D	smu_7_0_0_d.h	`725 #define ixLCAC_MC0_CNTL 0xc0400d30 macro`
A D	smu_7_1_1_d.h	`1025 #define ixLCAC_MC0_CNTL 0xc0400130 macro`
A D	smu_7_0_1_d.h	`1215 #define ixLCAC_MC0_CNTL 0xc0400d30 macro`
A D	smu_7_1_2_d.h	`1176 #define ixLCAC_MC0_CNTL 0xc0400130 macro`
A D	smu_7_1_3_d.h	`1108 #define ixLCAC_MC0_CNTL 0xc0400130 macro`
A D	smu_7_1_0_d.h	`1244 #define ixLCAC_MC0_CNTL 0xc0400d30 macro`
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A D	smu7_hwmgr.c	`1244 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x5); in smu7_enable_sclk_mclk_dpm() 1249 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x400009); in smu7_enable_sclk_mclk_dpm() 1252 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x400005); in smu7_enable_sclk_mclk_dpm()`

Completed in 57 milliseconds