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Searched refs:ixLCAC_MC1_OVR_VAL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
A Dsmu_6_0_d.h31 #define ixLCAC_MC1_OVR_VAL 0x0121 macro
A Dsmu_8_0_d.h637 #define ixLCAC_MC1_OVR_VAL 0xd0208144 macro
A Dsmu_7_0_0_d.h730 #define ixLCAC_MC1_OVR_VAL 0xc0400d44 macro
A Dsmu_7_1_1_d.h1030 #define ixLCAC_MC1_OVR_VAL 0xc0400144 macro
A Dsmu_7_0_1_d.h1220 #define ixLCAC_MC1_OVR_VAL 0xc0400d44 macro
A Dsmu_7_1_2_d.h1181 #define ixLCAC_MC1_OVR_VAL 0xc0400144 macro
A Dsmu_7_1_3_d.h1113 #define ixLCAC_MC1_OVR_VAL 0xc0400144 macro
A Dsmu_7_1_0_d.h1249 #define ixLCAC_MC1_OVR_VAL 0xc0400d44 macro
/linux/drivers/gpu/drm/amd/pm/powerplay/
A Dkv_dpm.c543 WREG32_SMC(ixLCAC_MC1_OVR_VAL, 0);

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