Searched refs:lane_settings (Results 1 – 11 of 11) sorted by relevance
159 data.set_vspe.swing = lt_settings->lane_settings[0].VOLTAGE_SWING; in dpia_build_set_config_data()160 data.set_vspe.pre_emph = lt_settings->lane_settings[0].PRE_EMPHASIS; in dpia_build_set_config_data()162 lt_settings->lane_settings[0].VOLTAGE_SWING == in dpia_build_set_config_data()165 lt_settings->lane_settings[0].PRE_EMPHASIS == in dpia_build_set_config_data()385 lt_settings->lane_settings, in dpia_training_cr_non_transparent()
110 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);112 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);782 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) in maximize_lane_settings()790 max_requested.FFE_PRESET = lane_settings[0].FFE_PRESET; in maximize_lane_settings()801 if (lane_settings[lane].FFE_PRESET.settings.level > in maximize_lane_settings()804 lane_settings[lane].FFE_PRESET.settings.level; in maximize_lane_settings()1573 lt_settings->lane_settings[lane].VOLTAGE_SWING =1577 lt_settings->lane_settings[lane].PRE_EMPHASIS =1581 lt_settings->lane_settings[lane].POST_CURSOR2 =1848 lt_settings->lane_settings[0].VOLTAGE_SWING,[all …]
367 link_settings->lane_settings[0].FFE_PRESET.raw); in dp_set_hw_lane_settings()376 link_settings->lane_settings, in dp_set_hw_lane_settings()
97 struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]; member
165 uint32_t lane_settings; member
1127 link_settings->lane_settings[lane].VOLTAGE_SWING; in dcn10_link_encoder_dp_set_lane_settings()1129 link_settings->lane_settings[lane].PRE_EMPHASIS; in dcn10_link_encoder_dp_set_lane_settings()1137 link_settings->lane_settings[lane].POST_CURSOR2; in dcn10_link_encoder_dp_set_lane_settings()1141 cntl.lane_settings = training_lane_set.raw; in dcn10_link_encoder_dp_set_lane_settings()
1351 link_settings->lane_settings[lane].VOLTAGE_SWING; in dce110_link_encoder_dp_set_lane_settings()1353 link_settings->lane_settings[lane].PRE_EMPHASIS; in dce110_link_encoder_dp_set_lane_settings()1361 link_settings->lane_settings[lane].POST_CURSOR2; in dce110_link_encoder_dp_set_lane_settings()1365 cntl.lane_settings = training_lane_set.raw; in dce110_link_encoder_dp_set_lane_settings()
473 params.asMode.ucLaneSet = (uint8_t)cntl->lane_settings; in transmitter_control_v2()601 params.asMode.ucLaneSet = (uint8_t)cntl->lane_settings; in transmitter_control_v3()734 params.asMode.ucLaneSet = (uint8_t)(cntl->lane_settings); in transmitter_control_v4()831 params.ucDPLaneSet = (uint8_t) cntl->lane_settings; in transmitter_control_v1_5()881 params.ucDPLaneSet = (uint8_t)cntl->lane_settings; in transmitter_control_v1_6()
281 ps.param.mode_laneset.dplaneset = (uint8_t)cntl->lane_settings; in transmitter_control_v1_6()352 dig_v1_7.mode_laneset.dplaneset = (uint8_t)cntl->lane_settings; in transmitter_control_v1_7()
539 link_lane_settings.lane_settings[r].VOLTAGE_SWING = in dp_phy_settings_write()541 link_lane_settings.lane_settings[r].PRE_EMPHASIS = in dp_phy_settings_write()543 link_lane_settings.lane_settings[r].POST_CURSOR2 = in dp_phy_settings_write()737 link_training_settings.lane_settings[i] = link->cur_lane_setting[i]; in dp_phy_test_pattern_debugfs_write()
574 cntl.lane_settings = ffe_preset; in dcn31_hpo_dp_link_enc_set_ffe()
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