Searched refs:lrc_reg_state (Results 1 – 11 of 11) sorted by relevance
| /linux/drivers/gpu/drm/i915/gt/ |
| A D | intel_lrc.c | 869 __lrc_init_regs(ce->lrc_reg_state, ce, engine, inhibit); in lrc_init_regs()
875 __reset_stop_ring(ce->lrc_reg_state, engine); in lrc_reset_regs()
1057 ce->lrc_reg_state = vaddr + LRC_STATE_OFFSET; in lrc_pin()
1068 check_redzone((void *)ce->lrc_reg_state - LRC_STATE_OFFSET, in lrc_unpin()
1193 ptr = ce->lrc_reg_state; in context_indirect_bb()
1213 lrc_setup_indirect_ctx(ce->lrc_reg_state, engine, in setup_indirect_ctx_bb()
1274 u32 *regs = ce->lrc_reg_state; in lrc_update_regs()
1310 set_offsets(ce->lrc_reg_state, reg_offsets(engine), engine, false); in lrc_update_offsets()
1318 u32 *regs = ce->lrc_reg_state; in lrc_check_regs()
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| A D | intel_lrc.h | 79 return READ_ONCE(ce->lrc_reg_state[CTX_TIMESTAMP]); in lrc_get_runtime()
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| A D | selftest_lrc.c | 766 arg->ce[0]->lrc_reg_state[CTX_TIMESTAMP] = arg->poison; in __lrc_timestamp()
776 arg->ce[1]->lrc_reg_state[CTX_TIMESTAMP] = 0xdeadbeef; in __lrc_timestamp()
797 timestamp = READ_ONCE(arg->ce[0]->lrc_reg_state[CTX_TIMESTAMP]); in __lrc_timestamp()
1503 const u32 * const ctx_bb = (void *)(ce->lrc_reg_state) - in check_ring_start()
1506 if (ctx_bb[CTX_BB_CANARY_INDEX] == ce->lrc_reg_state[CTX_RING_START]) in check_ring_start()
1511 ce->lrc_reg_state[CTX_RING_START]); in check_ring_start()
1638 ce->lrc_reg_state, in garbage()
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| A D | intel_context_types.h | 126 u32 *lrc_reg_state; member
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| A D | intel_engine_cs.c | 1781 if (rq->context->lrc_reg_state) { in engine_dump_request()
1783 hexdump(m, rq->context->lrc_reg_state, PAGE_SIZE); in engine_dump_request()
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| A D | intel_execlists_submission.c | 686 GEM_BUG_ON(ce->lrc_reg_state[CTX_RING_TAIL] != rq->ring->tail); in execlists_update_context()
691 ce->lrc_reg_state[CTX_RING_TAIL] = tail; in execlists_update_context()
1957 rq->context->lrc_reg_state; in process_csb()
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| /linux/drivers/gpu/drm/i915/gvt/ |
| A D | scheduler.c | 72 shadow_ring_context = (struct execlist_ring_context *)ctx->lrc_reg_state; in update_shadow_pdps()
144 context_base = (void *) ctx->lrc_reg_state - in populate_shadow_context()
147 shadow_ring_context = (void *) ctx->lrc_reg_state; in populate_shadow_context()
595 (struct execlist_ring_context *)rq->context->lrc_reg_state; in update_wa_ctx_2_shadow_ctx()
978 context_base = (void *) ctx->lrc_reg_state - in update_guest_context()
1017 shadow_ring_context = (void *) ctx->lrc_reg_state; in update_guest_context()
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| A D | mmio_context.c | 461 const u32 *reg_state = ce->lrc_reg_state; in is_inhibit_context()
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| A D | cmd_parser.c | 3184 s.rb_va = ce->lrc_reg_state; in intel_gvt_scan_engine_context()
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| /linux/drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_guc_submission.c | 433 (ce->lrc_reg_state + in __get_parent_scratch()
718 rq->context->lrc_reg_state[CTX_RING_TAIL] = in guc_set_lrc_tail()
3902 ce->lrc_reg_state[CTX_RING_HEAD]); in guc_log_context()
3905 ce->lrc_reg_state[CTX_RING_TAIL]); in guc_log_context()
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| /linux/drivers/gpu/drm/i915/ |
| A D | i915_perf.c | 2126 u32 *reg_state = ce->lrc_reg_state; in gen8_update_reg_state_unlocked()
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