/linux/drivers/gpu/drm/radeon/ |
A D | cypress_dpm.c | 955 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s0); in cypress_populate_mc_reg_addresses() 957 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s1); in cypress_populate_mc_reg_addresses() 1003 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_EMRS >> 2; in cypress_set_mc_reg_address_table() 1007 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_MRS >> 2; in cypress_set_mc_reg_address_table() 1014 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC1 >> 2; in cypress_set_mc_reg_address_table() 1015 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC1 >> 2; in cypress_set_mc_reg_address_table() 1022 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC3 >> 2; in cypress_set_mc_reg_address_table() 1023 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC3 >> 2; in cypress_set_mc_reg_address_table() 1037 RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2); in cypress_retrieve_ac_timing_for_one_entry() 1171 value = RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2); in cypress_copy_ac_timing_from_s1_to_s0() [all …]
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A D | btc_dpm.c | 1922 switch (table->mc_reg_address[i].s1) { in btc_set_mc_special_registers() 1925 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in btc_set_mc_special_registers() 1926 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in btc_set_mc_special_registers() 1938 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in btc_set_mc_special_registers() 1939 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in btc_set_mc_special_registers() 1954 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in btc_set_mc_special_registers() 1955 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in btc_set_mc_special_registers() 1982 table->mc_reg_address[i].s0 = in btc_set_s0_mc_reg_index() 1983 btc_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in btc_set_s0_mc_reg_index() 1984 address : table->mc_reg_address[i].s1; in btc_set_s0_mc_reg_index() [all …]
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A D | cypress_dpm.h | 39 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member
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A D | ni_dpm.c | 2718 switch (table->mc_reg_address[i].s1) { in ni_set_mc_special_registers() 2723 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ni_set_mc_special_registers() 2724 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in ni_set_mc_special_registers() 2734 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in ni_set_mc_special_registers() 2735 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ni_set_mc_special_registers() 2749 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in ni_set_mc_special_registers() 2841 table->mc_reg_address[i].s0 = in ni_set_s0_mc_reg_index() 2843 address : table->mc_reg_address[i].s1; in ni_set_s0_mc_reg_index() 2857 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ni_copy_vbios_mc_reg_table() 2934 cpu_to_be16(ni_pi->mc_reg_table.mc_reg_address[j].s0); in ni_populate_mc_reg_addresses() [all …]
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A D | si_dpm.h | 117 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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A D | ni_dpm.h | 57 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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A D | ci_dpm.c | 4309 switch(table->mc_reg_address[i].s1 << 2) { in ci_set_mc_special_registers() 4312 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ci_set_mc_special_registers() 4323 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in ci_set_mc_special_registers() 4324 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ci_set_mc_special_registers() 4336 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in ci_set_mc_special_registers() 4337 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in ci_set_mc_special_registers() 4349 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in ci_set_mc_special_registers() 4464 table->mc_reg_address[i].s0 = in ci_set_s0_mc_reg_index() 4466 address : table->mc_reg_address[i].s1; in ci_set_s0_mc_reg_index() 4481 ci_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ci_copy_vbios_mc_reg_table() [all …]
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A D | si_dpm.c | 5346 switch (table->mc_reg_address[i].s1 << 2) { in si_set_mc_special_registers() 5349 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in si_set_mc_special_registers() 5360 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in si_set_mc_special_registers() 5374 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers() 5375 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers() 5386 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in si_set_mc_special_registers() 5481 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index() 5482 address : table->mc_reg_address[i].s1; in si_set_s0_mc_reg_index() 5497 si_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in si_copy_vbios_mc_reg_table() 5574 cpu_to_be16(si_pi->mc_reg_table.mc_reg_address[j].s0); in si_populate_mc_reg_addresses() [all …]
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A D | ci_dpm.h | 87 SMU7_Discrete_MCRegisterAddress mc_reg_address[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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A D | radeon_mode.h | 667 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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A D | radeon_atombios.c | 4018 reg_table->mc_reg_address[i].s1 = in radeon_atom_init_mc_reg_table() 4020 reg_table->mc_reg_address[i].pre_reg_data = in radeon_atom_init_mc_reg_table() 4036 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in radeon_atom_init_mc_reg_table() 4040 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in radeon_atom_init_mc_reg_table()
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/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
A D | iceland_smumgr.c | 2473 table->mc_reg_address[i].s0 = in iceland_set_s0_mc_reg_index() 2475 ? address : table->mc_reg_address[i].s1; in iceland_set_s0_mc_reg_index() 2491 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in iceland_copy_vbios_smc_reg_table() 2520 switch (table->mc_reg_address[i].s1) { in iceland_set_mc_special_registers() 2524 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in iceland_set_mc_special_registers() 2525 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in iceland_set_mc_special_registers() 2536 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in iceland_set_mc_special_registers() 2537 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in iceland_set_mc_special_registers() 2552 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in iceland_set_mc_special_registers() 2553 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in iceland_set_mc_special_registers() [all …]
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A D | iceland_smumgr.h | 57 SMU71_Discrete_MCRegisterAddress mc_reg_address[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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A D | tonga_smumgr.h | 59 SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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A D | ci_smumgr.h | 58 SMU7_Discrete_MCRegisterAddress mc_reg_address[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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A D | ci_smumgr.c | 2545 table->mc_reg_address[i].s0 = in ci_set_s0_mc_reg_index() 2547 ? address : table->mc_reg_address[i].s1; in ci_set_s0_mc_reg_index() 2563 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ci_copy_vbios_smc_reg_table() 2592 switch (table->mc_reg_address[i].s1) { in ci_set_mc_special_registers() 2596 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in ci_set_mc_special_registers() 2597 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in ci_set_mc_special_registers() 2608 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in ci_set_mc_special_registers() 2609 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in ci_set_mc_special_registers() 2623 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in ci_set_mc_special_registers() 2624 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in ci_set_mc_special_registers() [all …]
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A D | tonga_smumgr.c | 2936 table->mc_reg_address[i].s0 = in tonga_set_s0_mc_reg_index() 2940 table->mc_reg_address[i].s1; in tonga_set_s0_mc_reg_index() 2956 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in tonga_copy_vbios_smc_reg_table() 2985 switch (table->mc_reg_address[i].s1) { in tonga_set_mc_special_registers() 2990 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in tonga_set_mc_special_registers() 2991 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in tonga_set_mc_special_registers() 3002 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in tonga_set_mc_special_registers() 3003 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in tonga_set_mc_special_registers() 3017 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in tonga_set_mc_special_registers() 3018 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in tonga_set_mc_special_registers() [all …]
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/linux/drivers/gpu/drm/amd/pm/powerplay/ |
A D | si_dpm.h | 279 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member 625 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member 933 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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A D | si_dpm.c | 5804 switch (table->mc_reg_address[i].s1) { in si_set_mc_special_registers() 5807 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS; in si_set_mc_special_registers() 5808 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP; in si_set_mc_special_registers() 5818 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS; in si_set_mc_special_registers() 5819 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP; in si_set_mc_special_registers() 5832 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD; in si_set_mc_special_registers() 5833 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD; in si_set_mc_special_registers() 5842 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1; in si_set_mc_special_registers() 5934 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index() 5935 address : table->mc_reg_address[i].s1; in si_set_s0_mc_reg_index() [all …]
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/linux/drivers/gpu/drm/amd/amdgpu/ |
A D | amdgpu_atombios.h | 116 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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A D | amdgpu_atombios.c | 1455 reg_table->mc_reg_address[i].s1 = in amdgpu_atombios_init_mc_reg_table() 1457 reg_table->mc_reg_address[i].pre_reg_data = in amdgpu_atombios_init_mc_reg_table() 1473 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in amdgpu_atombios_init_mc_reg_table() 1477 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in amdgpu_atombios_init_mc_reg_table()
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
A D | ppatomctrl.h | 242 pp_atomctrl_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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A D | ppatomctrl.c | 69 if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing() 74 } else if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing() 118 table->mc_reg_address[i].s1 = in atomctrl_set_mc_reg_address_table() 120 table->mc_reg_address[i].uc_pre_reg_data = in atomctrl_set_mc_reg_address_table()
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