/linux/drivers/gpu/drm/amd/amdgpu/ |
A D | amdgpu_gfx.c | 45 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit() 46 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit() 58 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue() 59 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue() 68 adev->gfx.mec.queue_bitmap); in amdgpu_gfx_is_mec_queue_enabled() 194 return adev->gfx.mec.num_mec > 1; in amdgpu_gfx_is_multipipe_capable() 226 adev->gfx.mec.queue_bitmap); in amdgpu_gfx_compute_queue_acquire() 263 int mec, pipe, queue; in amdgpu_gfx_kiq_acquire() local 265 queue_bit = adev->gfx.mec.num_mec in amdgpu_gfx_kiq_acquire() 283 ring->me = mec + 1; in amdgpu_gfx_kiq_acquire() [all …]
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A D | amdgpu_amdkfd_gfx_v9.c | 60 soc15_grbm_select(adev, mec, pipe, queue, vmid); in lock_srbm() 76 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local 79 lock_srbm(kgd, mec, pipe, queue_id, 0); in acquire_queue() 177 uint32_t mec; in kgd_gfx_v9_init_interrupts() local 180 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_init_interrupts() 183 lock_srbm(kgd, mec, pipe, 0, 0); in kgd_gfx_v9_init_interrupts() 323 uint32_t mec, pipe; in kgd_gfx_v9_hiq_mqd_load() local 330 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_hiq_mqd_load() 334 mec, pipe, queue_id); in kgd_gfx_v9_hiq_mqd_load() 349 PACKET3_MAP_QUEUES_ME((mec - 1)) | in kgd_gfx_v9_hiq_mqd_load() [all …]
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A D | amdgpu_amdkfd_gfx_v10_3.c | 68 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local 71 lock_srbm(kgd, mec, pipe, queue_id, 0); in acquire_queue() 124 uint32_t mec; in init_interrupts_v10_3() local 127 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v10_3() 130 lock_srbm(kgd, mec, pipe, 0, 0); in init_interrupts_v10_3() 208 uint32_t value, mec, pipe; in hqd_load_v10_3() local 210 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v10_3() 214 mec, pipe, queue_id); in hqd_load_v10_3() 296 uint32_t mec, pipe; in hiq_mqd_load_v10_3() local 303 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v10_3() [all …]
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A D | amdgpu_amdkfd_gfx_v8.c | 70 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local 73 lock_srbm(kgd, mec, pipe, queue_id, 0); in acquire_queue() 129 uint32_t mec; in kgd_init_interrupts() local 132 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts() 133 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts() 135 lock_srbm(kgd, mec, pipe, 0, 0); in kgd_init_interrupts() 185 uint32_t value, mec, pipe; in kgd_hqd_load() local 187 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hqd_load() 188 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hqd_load() 191 mec, pipe, queue_id); in kgd_hqd_load() [all …]
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A D | amdgpu_amdkfd_gfx_v10.c | 53 nv_grbm_select(adev, mec, pipe, queue, vmid); in lock_srbm() 69 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local 72 lock_srbm(kgd, mec, pipe, queue_id, 0); in acquire_queue() 156 uint32_t mec; in kgd_init_interrupts() local 159 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts() 160 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts() 162 lock_srbm(kgd, mec, pipe, 0, 0); in kgd_init_interrupts() 311 uint32_t mec, pipe; in kgd_hiq_mqd_load() local 318 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hiq_mqd_load() 322 mec, pipe, queue_id); in kgd_hiq_mqd_load() [all …]
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A D | amdgpu_amdkfd_gfx_v7.c | 90 static void lock_srbm(struct kgd_dev *kgd, uint32_t mec, uint32_t pipe, in lock_srbm() argument 94 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); in lock_srbm() 113 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local 114 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue() 116 lock_srbm(kgd, mec, pipe, queue_id, 0); in acquire_queue() 171 uint32_t mec; in kgd_init_interrupts() local 174 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts() 175 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts() 177 lock_srbm(kgd, mec, pipe, 0, 0); in kgd_init_interrupts()
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A D | amdgpu_gfx.h | 276 struct amdgpu_mec mec; member 386 int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec, 389 int *mec, int *pipe, int *queue); 390 bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, int mec,
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A D | amdgpu_amdkfd.c | 124 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, in amdgpu_amdkfd_device_init() 125 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, in amdgpu_amdkfd_device_init() 138 adev->gfx.mec.queue_bitmap, in amdgpu_amdkfd_device_init() 145 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init() 146 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
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A D | gfx_v7_0.c | 2807 mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec in gfx_v7_0_mec_init() 2812 &adev->gfx.mec.hpd_eop_obj, in gfx_v7_0_mec_init() 2813 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v7_0_mec_init() 2870 int mec, int pipe) in gfx_v7_0_compute_pipe_init() argument 2874 size_t eop_offset = (mec * adev->gfx.mec.num_pipe_per_mec + pipe) in gfx_v7_0_compute_pipe_init() 4423 int mec, int pipe, int queue) in gfx_v7_0_compute_ring_init() argument 4430 ring->me = mec + 1; in gfx_v7_0_compute_ring_init() 4462 adev->gfx.mec.num_mec = 2; in gfx_v7_0_sw_init() 4469 adev->gfx.mec.num_mec = 1; in gfx_v7_0_sw_init() 4472 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v7_0_sw_init() [all …]
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A D | gfx_v9_0.c | 2019 &adev->gfx.mec.hpd_eop_obj, in gfx_v9_0_mec_init() 2043 &adev->gfx.mec.mec_fw_obj, in gfx_v9_0_mec_init() 2282 int mec, int pipe, int queue) in gfx_v9_0_compute_ring_init() argument 2291 ring->me = mec + 1; in gfx_v9_0_compute_ring_init() 2328 adev->gfx.mec.num_mec = 2; in gfx_v9_0_sw_init() 2331 adev->gfx.mec.num_mec = 1; in gfx_v9_0_sw_init() 2335 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_0_sw_init() 2336 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v9_0_sw_init() 3798 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v9_0_kiq_init_queue() 3821 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v9_0_kiq_init_queue() [all …]
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A D | gfx_v8_0.c | 1358 &adev->gfx.mec.hpd_eop_obj, in gfx_v8_0_mec_init() 1902 int mec, int pipe, int queue) in gfx_v8_0_compute_ring_init() argument 1912 ring->me = mec + 1; in gfx_v8_0_compute_ring_init() 1956 adev->gfx.mec.num_mec = 2; in gfx_v8_0_sw_init() 1961 adev->gfx.mec.num_mec = 1; in gfx_v8_0_sw_init() 1965 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v8_0_sw_init() 1966 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v8_0_sw_init() 4647 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v8_0_kiq_init_queue() 4669 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v8_0_kiq_init_queue() 4692 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v8_0_kcq_init_queue() [all …]
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A D | gfx_v10_0.c | 4515 &adev->gfx.mec.hpd_eop_obj, in gfx_v10_0_mec_init() 4539 &adev->gfx.mec.mec_fw_obj, in gfx_v10_0_mec_init() 4768 ring->me = mec + 1; in gfx_v10_0_compute_ring_init() 4807 adev->gfx.mec.num_mec = 2; in gfx_v10_0_sw_init() 4808 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init() 4809 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init() 4820 adev->gfx.mec.num_mec = 2; in gfx_v10_0_sw_init() 4821 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init() 4822 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v10_0_sw_init() 4828 adev->gfx.mec.num_mec = 1; in gfx_v10_0_sw_init() [all …]
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/linux/drivers/gpu/drm/radeon/ |
A D | cik.c | 4362 if (rdev->mec.hpd_eop_obj) { in cik_mec_fini() 4370 rdev->mec.hpd_eop_obj = NULL; in cik_mec_fini() 4386 rdev->mec.num_mec = 2; in cik_mec_init() 4388 rdev->mec.num_mec = 1; in cik_mec_init() 4389 rdev->mec.num_pipe = 4; in cik_mec_init() 4390 rdev->mec.num_queue = rdev->mec.num_mec * rdev->mec.num_pipe * 8; in cik_mec_init() 4394 rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2, in cik_mec_init() 4397 &rdev->mec.hpd_eop_obj); in cik_mec_init() 4410 &rdev->mec.hpd_eop_gpu_addr); in cik_mec_init() 4424 memset(hpd, 0, rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2); in cik_mec_init() [all …]
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A D | radeon.h | 2446 struct radeon_mec mec; member
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/linux/drivers/gpu/drm/amd/amdkfd/ |
A D | kfd_device_queue_manager.c | 72 static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe) in is_pipe_enabled() argument 75 int pipe_offset = (mec * dqm->dev->shared_resources.num_pipe_per_mec in is_pipe_enabled() 1107 int i, mec; in set_sched_resources() local 1114 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe) in set_sched_resources() 1121 if (mec > 0) in set_sched_resources()
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A D | kfd_priv.h | 536 uint32_t mec; member
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/linux/Documentation/translations/zh_CN/process/ |
A D | magic-number.rst | 36 <mailto:mec@shout.net>
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/linux/Documentation/translations/zh_TW/process/ |
A D | magic-number.rst | 39 <mailto:mec@shout.net>
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/linux/Documentation/process/ |
A D | magic-number.rst | 41 <mailto:mec@shout.net>
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/linux/Documentation/translations/it_IT/process/ |
A D | magic-number.rst | 46 <mailto:mec@shout.net>
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/linux/Documentation/userspace-api/ioctl/ |
A D | ioctl-number.rst | 8 <mec@shout.net> 33 patch to Linus Torvalds. Or you can e-mail me at <mec@shout.net> and
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/linux/Documentation/kbuild/ |
A D | makefiles.rst | 1649 - Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
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/linux/ |
A D | CREDITS | 656 E: mec@shout.net
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