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Searched refs:memory_base (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/etnaviv/
A Detnaviv_iommu.c100 gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_RA, context->global->memory_base); in etnaviv_iommuv1_restore()
101 gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_FE, context->global->memory_base); in etnaviv_iommuv1_restore()
102 gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_TX, context->global->memory_base); in etnaviv_iommuv1_restore()
103 gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_PEZ, context->global->memory_base); in etnaviv_iommuv1_restore()
104 gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_PE, context->global->memory_base); in etnaviv_iommuv1_restore()
A Detnaviv_mmu.h50 u32 memory_base; member
90 struct etnaviv_gem_object *etnaviv_obj, u32 memory_base,
97 u32 memory_base, dma_addr_t paddr,
A Detnaviv_mmu.c229 struct etnaviv_gem_object *etnaviv_obj, u32 memory_base, in etnaviv_iommu_map_gem() argument
245 iova = sg_dma_address(sgt->sgl) - memory_base; in etnaviv_iommu_map_gem()
328 global->memory_base); in etnaviv_iommu_context_init()
356 u32 memory_base, dma_addr_t paddr, in etnaviv_iommu_get_suballoc_va() argument
374 mapping->iova = paddr - memory_base; in etnaviv_iommu_get_suballoc_va()
A Detnaviv_cmdbuf.c66 u32 memory_base) in etnaviv_cmdbuf_suballoc_map() argument
68 return etnaviv_iommu_get_suballoc_va(context, mapping, memory_base, in etnaviv_cmdbuf_suballoc_map()
A Detnaviv_cmdbuf.h33 u32 memory_base);
A Detnaviv_gpu.c825 priv->mmu_global->memory_base = SZ_2G; in etnaviv_gpu_init()
827 priv->mmu_global->memory_base = cmdbuf_paddr; in etnaviv_gpu_init()
832 priv->mmu_global->memory_base = SZ_2G; in etnaviv_gpu_init()
A Detnaviv_gem.c301 mmu_context->global->memory_base, in etnaviv_gem_mapping_get()
/linux/arch/mips/sgi-ip27/
A Dip27-console.c30 ioc3 = (struct ioc3 *)KL_CONFIG_CH_CONS_INFO(nasid)->memory_base; in console_uart()
/linux/arch/mips/include/asm/sn/
A Dklconfig.h129 unsigned long memory_base; member

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