| /linux/arch/arm64/include/asm/ |
| A D | cputype.h | 25 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK) argument
28 #define MIDR_PARTNUM(midr) \ argument
29 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
32 #define MIDR_ARCHITECTURE(midr) \ argument
36 #define MIDR_VARIANT(midr) \ argument
37 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
40 #define MIDR_IMPLEMENTOR(midr) \ argument
41 (((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
181 u32 _model = midr & MIDR_CPU_MODEL_MASK; in midr_is_cpu_model_range()
189 return midr_is_cpu_model_range(midr, range->model, in is_midr_in_range()
[all …]
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| /linux/arch/arm/kernel/ |
| A D | smp_tlb.c | 96 unsigned int midr = read_cpuid_id(); in erratum_a15_798181_init() local
125 if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) { in erratum_a15_798181_init()
127 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) { in erratum_a15_798181_init()
129 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) { in erratum_a15_798181_init()
136 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) { in erratum_a15_798181_init()
143 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) { in erratum_a15_798181_init()
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| A D | setup.c | 679 struct proc_info_list *lookup_processor(u32 midr) in lookup_processor() argument
681 struct proc_info_list *list = lookup_processor_type(midr); in lookup_processor()
685 smp_processor_id(), midr); in lookup_processor()
695 unsigned int midr = read_cpuid_id(); in setup_processor() local
696 struct proc_info_list *list = lookup_processor(midr); in setup_processor()
713 list->cpu_name, midr, midr & 15, in setup_processor()
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| /linux/tools/perf/arch/arm64/util/ |
| A D | header.c | 20 u64 midr = 0; in _get_cpuid() local
50 midr = strtoul(buf, NULL, 16); in _get_cpuid()
51 midr &= (~(MIDR_VARIANT_MASK | MIDR_REVISION_MASK)); in _get_cpuid()
52 scnprintf(buf, MIDR_SIZE, "0x%016lx", midr); in _get_cpuid()
59 if (!midr) in _get_cpuid()
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| /linux/arch/arm64/kernel/ |
| A D | cpuinfo.c | 144 u32 midr = cpuinfo->reg_midr; in c_show() local
154 MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); in c_show()
194 MIDR_IMPLEMENTOR(midr)); in c_show()
196 seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr)); in c_show()
197 seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr)); in c_show()
198 seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr)); in c_show()
256 CPUREGS_ATTR_RO(midr_el1, midr);
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| A D | cpu_errata.c | 21 u32 midr = read_cpuid_id(), revidr; in is_affected_midr_range() local
24 if (!is_midr_in_range(midr, &entry->midr_range)) in is_affected_midr_range()
27 midr &= MIDR_REVISION_MASK | MIDR_VARIANT_MASK; in is_affected_midr_range()
30 if (midr == fix->midr_rv && (revidr & fix->revidr_mask)) in is_affected_midr_range()
189 u32 midr = read_cpuid_id(); in has_neoverse_n1_erratum_1542419() local
194 return is_midr_in_range(midr, &range) && has_dic; in has_neoverse_n1_erratum_1542419()
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| A D | proton-pack.c | 220 u32 midr = read_cpuid_id(); in spectre_v2_get_sw_mitigation_cb() local
221 if (((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR) && in spectre_v2_get_sw_mitigation_cb()
222 ((midr & MIDR_CPU_MODEL_MASK) != MIDR_QCOM_FALKOR_V1)) in spectre_v2_get_sw_mitigation_cb()
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| A D | cpufeature.c | 1382 u32 midr = read_cpuid_id(); in has_no_hw_prefetch() local
1385 return midr_is_cpu_model_range(midr, MIDR_THUNDERX, in has_no_hw_prefetch()
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| /linux/include/ras/ |
| A D | ras_event.h | 179 __field(u64, midr)
194 __entry->midr = proc->midr;
206 __entry->affinity, __entry->mpidr, __entry->midr,
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| /linux/drivers/net/ethernet/marvell/octeontx2/nic/ |
| A D | otx2_common.h | 431 u8 midr = pdev->revision & 0xF0; in is_dev_otx2() local
433 return (midr == PCI_REVISION_ID_96XX || midr == PCI_REVISION_ID_95XX || in is_dev_otx2()
434 midr == PCI_REVISION_ID_95XXN || midr == PCI_REVISION_ID_98XX || in is_dev_otx2()
435 midr == PCI_REVISION_ID_95XXMM || midr == PCI_REVISION_ID_95XXO); in is_dev_otx2()
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| /linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| A D | rvu.h | 571 u8 midr = pdev->revision & 0xF0; in is_rvu_otx2() local
573 return (midr == PCI_REVISION_ID_96XX || midr == PCI_REVISION_ID_95XX || in is_rvu_otx2()
574 midr == PCI_REVISION_ID_95XXN || midr == PCI_REVISION_ID_98XX || in is_rvu_otx2()
575 midr == PCI_REVISION_ID_95XXMM || midr == PCI_REVISION_ID_95XXO); in is_rvu_otx2()
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| /linux/arch/arm/include/asm/ |
| A D | cputype.h | 114 struct proc_info_list *lookup_processor(u32 midr);
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| /linux/drivers/firmware/efi/ |
| A D | cper-arm.c | 246 printk("%sMIDR: 0x%016llx\n", pfx, proc->midr); in cper_print_proc_arm()
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| /linux/include/linux/ |
| A D | cper.h | 413 u64 midr; member
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| /linux/Documentation/arm64/ |
| A D | cpu-feature-registers.rst | 81 \- midr
|