Searched refs:min_dpb_size (Results 1 – 2 of 2) sorted by relevance
669 min_dpb_size = image_size * num_dpb_buffer; in amdgpu_uvd_cs_msg_decode()681 min_dpb_size = image_size * 3; in amdgpu_uvd_cs_msg_decode()687 min_dpb_size += width_in_mb * 64; in amdgpu_uvd_cs_msg_decode()690 min_dpb_size += width_in_mb * 128; in amdgpu_uvd_cs_msg_decode()694 min_dpb_size += ALIGN(tmp * 7 * 16, 64); in amdgpu_uvd_cs_msg_decode()700 min_dpb_size = image_size * 3; in amdgpu_uvd_cs_msg_decode()706 min_dpb_size = image_size * 3; in amdgpu_uvd_cs_msg_decode()751 min_dpb_size += in amdgpu_uvd_cs_msg_decode()764 min_dpb_size = 0; in amdgpu_uvd_cs_msg_decode()787 if (dpb_size < min_dpb_size) { in amdgpu_uvd_cs_msg_decode()[all …]
367 unsigned image_size, tmp, min_dpb_size; in radeon_uvd_cs_msg_decode() local377 min_dpb_size = image_size * 17; in radeon_uvd_cs_msg_decode()383 min_dpb_size += width_in_mb * height_in_mb * 32; in radeon_uvd_cs_msg_decode()389 min_dpb_size = image_size * 3; in radeon_uvd_cs_msg_decode()395 min_dpb_size += width_in_mb * 64; in radeon_uvd_cs_msg_decode()398 min_dpb_size += width_in_mb * 128; in radeon_uvd_cs_msg_decode()402 min_dpb_size += ALIGN(tmp * 7 * 16, 64); in radeon_uvd_cs_msg_decode()408 min_dpb_size = image_size * 3; in radeon_uvd_cs_msg_decode()414 min_dpb_size = image_size * 3; in radeon_uvd_cs_msg_decode()433 if (dpb_size < min_dpb_size) { in radeon_uvd_cs_msg_decode()[all …]
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