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Searched refs:mmPSOC_PCI_PLL_DIV_SEL_1 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/misc/habanalabs/include/goya/asic_reg/
A Dpsoc_pci_pll_regs.h62 #define mmPSOC_PCI_PLL_DIV_SEL_1 0xC72284 macro
/linux/drivers/misc/habanalabs/goya/
A Dgoya.c747 div_sel = RREG32(mmPSOC_PCI_PLL_DIV_SEL_1); in goya_fetch_psoc_frequency()
1347 WREG32(mmPSOC_PCI_PLL_DIV_SEL_1, 0x0); in goya_set_pll_refclk()

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