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Searched refs:mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/rsmu/
A Drsmu_0_0_2_offset.h24 #define mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU 0x0d91 macro
/linux/drivers/gpu/drm/amd/amdgpu/
A Dumc_v6_1.c49 mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU); in umc_v6_1_enable_umc_index_mode()
64 mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU); in umc_v6_1_disable_umc_index_mode()
79 mmRSMU_UMC_INDEX_REGISTER_NBIF_VG20_GPU); in umc_v6_1_get_umc_index_mode_state()

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