Searched refs:mmUVD_MPC_SET_MUXB1_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
A D	uvd_7_0_offset.h	173 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
A D	vcn_1_0_offset.h	353 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro
A D	vcn_2_5_offset.h	768 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro
A D	vcn_2_0_0_offset.h	603 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro
A D	vcn_3_0_0_offset.h	1148 #define mmUVD_MPC_SET_MUXB1_BASE_IDX … macro

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