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Searched refs:mmUVD_RBC_IB_SIZE (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
A Duvd_4_0_d.h67 #define mmUVD_RBC_IB_SIZE 0x3DA2 macro
A Duvd_4_2_d.h69 #define mmUVD_RBC_IB_SIZE 0x3da2 macro
A Duvd_3_1_d.h71 #define mmUVD_RBC_IB_SIZE 0x3da2 macro
A Duvd_5_0_d.h75 #define mmUVD_RBC_IB_SIZE 0x3da2 macro
A Duvd_6_0_d.h91 #define mmUVD_RBC_IB_SIZE 0x3da2 macro
A Duvd_7_0_offset.h196 #define mmUVD_RBC_IB_SIZE macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
A Dvcn_1_0_offset.h382 #define mmUVD_RBC_IB_SIZE macro
A Dvcn_2_5_offset.h781 #define mmUVD_RBC_IB_SIZE macro
A Dvcn_2_0_0_offset.h676 #define mmUVD_RBC_IB_SIZE macro
A Dvcn_3_0_0_offset.h1165 #define mmUVD_RBC_IB_SIZE macro
/linux/drivers/gpu/drm/amd/amdgpu/
A Duvd_v3_1.c96 amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0)); in uvd_v3_1_ring_emit_ib()
A Duvd_v4_2.c546 amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0)); in uvd_v4_2_ring_emit_ib()
A Duvd_v5_0.c563 amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0)); in uvd_v5_0_ring_emit_ib()
A Duvd_v6_0.c1032 amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0)); in uvd_v6_0_ring_emit_ib()
A Duvd_v7_0.c1332 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_RBC_IB_SIZE), 0)); in uvd_v7_0_ring_emit_ib()
A Dvcn_v1_0.c1520 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_RBC_IB_SIZE), 0)); in vcn_v1_0_dec_ring_emit_ib()

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